2020
DOI: 10.17775/cseejpes.2019.02390
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Comparative study of single-phase phase-locked loops for grid-connected inverters under non-ideal grid conditions

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Cited by 30 publications
(8 citation statements)
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“…For the second-stage passive filter, the relationship between uo2 and us2 can be expressed as (12) Then the deviation angular γ2 and the cutoff frequency ωc2 can be derived as (13) The impact of increasing r6 or C2 is similar to that of increasing r3 or C1. Ideally, the relationship between the input low-frequency current is1 and the output voltage uo2 can be expressed as (14) where the equivalent sampling resistance re can be calculated out as (15) When the measured current is zero, the digital zero drift detected by AD converter fluctuates within a specific range. If the resolution of AD converter is 12 bits and the maximum value of the input analog voltage is 3.3V, the current detection error Ie caused by digital zero drift can be calculated out as (16) where τ is the range width of the digital zero drift, and J is the ratio of current transformer.…”
Section: Current Detection Strategymentioning
confidence: 99%
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“…For the second-stage passive filter, the relationship between uo2 and us2 can be expressed as (12) Then the deviation angular γ2 and the cutoff frequency ωc2 can be derived as (13) The impact of increasing r6 or C2 is similar to that of increasing r3 or C1. Ideally, the relationship between the input low-frequency current is1 and the output voltage uo2 can be expressed as (14) where the equivalent sampling resistance re can be calculated out as (15) When the measured current is zero, the digital zero drift detected by AD converter fluctuates within a specific range. If the resolution of AD converter is 12 bits and the maximum value of the input analog voltage is 3.3V, the current detection error Ie caused by digital zero drift can be calculated out as (16) where τ is the range width of the digital zero drift, and J is the ratio of current transformer.…”
Section: Current Detection Strategymentioning
confidence: 99%
“…The fluctuation or distortion of AC voltage can cause zero crossing offset. And owing to the noise in the digital signal of voltage measurement, the multiple zeros appear in the judgment results [13][14][15] . For the single-phase power grid system, the voltage phase detection can be achieved using the phase locked loop (PLL) method based on a stationary coordinate system or a synchronous coordinate system.…”
Section: Introductionmentioning
confidence: 99%
“…The conventional PLL is composed of a voltage controlled oscillator (VCO), a loop filter (LF), and a phase detector (PD) (Xu, Qian, Bian, Hu, and Xie, 2020). Normally, the PD is of the multiplier type, whose output consists of a DC term that has the phase information of the input signal and an AC term that should be filtered by the LF (Awad, Svensson, and Bollen, 2005).…”
Section: Phase-locked Loopmentioning
confidence: 99%
“…Proportional integral (PI) based current controller is employed to control the single-phase grid-connected inverter due to its great advantage of providing infinite gain at the steady-state operating point, which gives zero steady-state error. However, this type of controller can not be implemented directly for single-phase gridconnected inverter, where it is required to create a second quantity that would be in quadrature with the available physical one [5]- [10].…”
Section: Introductionmentioning
confidence: 99%
“…Thus, the estimated phase angle 𝜃 𝑃𝐿𝐿 , which is equal to the grid phase angle could be obtained, and this is achieved by using PI controller that serves as loop filter (LF) to regulate 𝑉 𝑞 to zero value and then send the error to voltage controlled oscillator (VOC) which is represented by integrator as shown in Figure 2. The transfer function from 𝑉 𝑔𝑟𝑖𝑑 to 𝑉 𝛼𝛽 could be obtained with the help of Mason formula [5], [20], [21].…”
mentioning
confidence: 99%