Comparative Analysis of Different Types of Full Adder Circuits

Damle, M.B. Damle M.B.

doi:10.9790/0661-1130109

Cited by 11 publications

(1 citation statement)

References 8 publications

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“…Where, CL is the loading capacitance, fClk is the clock frequency which is actually the probability of logic 0 to 1 transition occurs (the activity factor). Vdd is the supply voltage, V is the output voltage swing which is equal to Vdd; but, in some logic circuits the voltage swing on some internal nodes may be slightly less [11]. The current Isc in the second term is due to the direct path short circuit current which arises when both the NMOS and PMOS transistors are simultaneously active, conducting current directly from supply to ground [12].…”

Section: Carry Look Ahead Adder Using Short Gate Finfetmentioning

confidence: 99%

Simulation and Performance Analysis of 32 nm FinFet based 4-Bit Carry Look Adder

Rashid¹,

Khan²,

Singh³

2017

J. Nano- Electron. Phys.

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FinFET at 32 nm and beyond is an emerging transistor technology offer interesting delay-power tradeoff. FinFETs are a necessary step in the evolution of semiconductors because bulk CMOS has difficulties in scaling beyond 32 nm. Use of the back gate leads to very interesting design opportunities. Rich diversity of design styles, made possible by independent control of FinFET gates, can be used effectively to reduce total active power consumption IG/LP mode circuits provide an encouraging tradeoff between power and area. In the research work FinFET and MOSFET based adders are simulated as these devices are standout amongst the most generally actualized squares of microchip chips and advanced parts in the computerized incorporated circuit outline.

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Section: Carry Look Ahead Adder Using Short Gate Finfetmentioning

confidence: 99%