2022 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES) 2022
DOI: 10.23919/mixdes55591.2022.9837990
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Comparative Analysis of CMOS Latch-Driver Circuits for Current-Steering Digital-to-Analog Converters

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“…In Fig. 3.16(a), t sw,r is sequential, and therefore, given by Figure 3.17: PT-type latch-driver circuits [60].…”
Section: Timing Circuitsmentioning
confidence: 99%
See 1 more Smart Citation
“…In Fig. 3.16(a), t sw,r is sequential, and therefore, given by Figure 3.17: PT-type latch-driver circuits [60].…”
Section: Timing Circuitsmentioning
confidence: 99%
“…Also, for the NAND gates, the PMOS transistors can be of minimum size. Important to mention that the crossing-point can be adjusted from the NMOS transistors in the NAND gates and the auxiliary PMOS transistors controlled by Y and X[60]. However, a circuit that integrates a control voltage to modify the crossing point between the complementary transitions is shown in Fig.3.19(b), which permits to dynamically adjust against processvoltage-temperature (PVT) variations.…”
mentioning
confidence: 99%