Compact Models for Initial MOSFET Sizing Based on Higher-order Artificial Neural Networks

Habal, Husni; Tsonev, Dobroslav; Schweikardt, Matthias

doi:10.1145/3380446.3430632

Cited by 11 publications

(5 citation statements)

References 9 publications

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“…The whole dataset will be split into train dataset and test dataset, with a 9:1(train: test) ratio. The test set may not be required since fitting the semiconductor device IV is a pure interpolation problem [7,43]. The measurement upper and lower bounds in voltage can be determined based on applications, and all predicted data points will fall within the bounds.…”

Section: A Data Preparation and Measurementmentioning

confidence: 99%

Neuroevolution-Based Efficient Field Effect Transistor Compact Device Models

Rawat

Yang

et al. 2021

IEEE Access

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Section: A Data Preparation and Measurementmentioning

confidence: 99%

Neuroevolution-Based Efficient Field Effect Transistor Compact Device Models

Rawat

Yang

et al. 2021

IEEE Access

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“…Several studies have been conducted to apply artificial neural networks in building models for MOSFET. In the literature [ 4 , 5 ], the electrical characteristics of MOSFET, including I-V curves and C-V curves, were directly adopted as the training data of the ANN. Two hidden layers were involved in the network and the learning result is achieved.…”

Section: Introductionmentioning

confidence: 99%

MOSFET Physics-Based Compact Model Mass-Produced: An Artificial Neural Network Approach

Huang

Wang

2023

Micromachines

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The continued scaling-down of nanoscale semiconductor devices has made it very challenging to obtain analytic surface potential solutions from complex equations in physics, which is the fundamental purpose of the MOSFET compact model. In this work, we proposed a general framework to automatically derive analytical solutions for surface potential in MOSFET, by leveraging the universal approximation power of deep neural networks. Our framework incorporated a physical-relation-neural-network (PRNN) to learn side-by-side from a general-purpose numerical simulator in handling complex equations of mathematical physics, and then instilled the “knowledge’’ from the simulation data into the neural network, so as to generate an accurate closed-form mapping between device parameters and surface potential. Inherently, the surface potential was able to reflect the numerical solution of a two-dimensional (2D) Poisson equation, surpassing the limits of traditional 1D Poisson equation solutions, thus better illustrating the physical characteristics of scaling devices. We obtained promising results in inferring the analytic surface potential of MOSFET, and in applying the derived potential function to the building of 130 nm MOSFET compact models and circuit simulation. Such an efficient framework with accurate prediction of device performances demonstrates its potential in device optimization and circuit design.

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“…The ANN-based CM presented in [48] is accurately used in the initial sizing of analog circuit components without simulation. Similarly, in [49] authors proposed a fast ANN-based CM technique to imitate parameter extraction (MPE) flow to replace the existing complicated CM implementation.…”

Section: Introductionmentioning

confidence: 99%

A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors

Butola,

Li,

Kola

2023

IEEE Open J. Nanotechnol.

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Machine learning (ML) is poised to play an important part in advancing the predicting capability in semiconductor device compact modeling domain. One major advantage of ML-based compact modeling is its ability to capture complex relationships and patterns in large datasets. Therefore, in this paper a novel design scheme based on dynamically adaptive neural network (DANN) is proposed to develop fast and accurate compact model (CM). This framework constitutes a powerful yet computationally efficient methodology and exhibits emergent dynamic behaviors. This paper demonstrates that the compact model based on ML can be designed to replicate the performance of conventional compact model for nanodevices. For this work, gate-all-around (GAA) nanosheet (NS) device characteristics are comprehensively analyzed for process variability sources using the proposed model. The device geometry parameters such as channel length, nanosheet width and nanosheet thickness are fed as input features to the DANN model. The adaptive neural network learns dynamically by updating weights of the model in accordance with the input features and achieves accurate neural weight convergence. The proposed model predicted the electrical characteristics of NS devices with less than 1% error rate. The model is also implemented and validated for the simulations of digital circuit designs such as inverter, and logic gates.

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Compact Models for Initial MOSFET Sizing Based on Higher-order Artificial Neural Networks

Cited by 11 publications

References 9 publications

Neuroevolution-Based Efficient Field Effect Transistor Compact Device Models

Neuroevolution-Based Efficient Field Effect Transistor Compact Device Models

MOSFET Physics-Based Compact Model Mass-Produced: An Artificial Neural Network Approach

A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors

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