Compact modeling for simulation of circuit reliability: Historical and industrial perspectives

Abstract

This paper provides a historical background of the first developments of compact modeling for circuit-level reliability simulation at UC Berkeley, and the subsequent implementation into the BERT reliability simulator more than 20 years ago. A brief description of the advancement in the technology since then is given, and some industrial perspectives are summarized concerning how such a tool can be used to effectively optimize product design while ensuring reliability, as well as clarifying issues which still remain in the industrial design environment.