Compact DC model of a JVeSFET transistor with reduced number of empirical parameters

Staniewski, Michal; Pfitzner, Andrzej

doi:10.1109/mixdes.2015.7208565

Cited by 1 publication

(2 citation statements)

References 5 publications

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“…Figure 1 shows a single cell, a comparison, and the labelling of the different areas in the two types of devices in a plan view and 3D view. There are two types of elementary cells in VESTIC technology: (a) a cell with a junctionless field-effect transistor (VESFET, green-polycrystalline gate area, pink-drain, source, and "channel" area, orange-insulating silicon dioxide); (b) a cell with a junction bipolar transistor (VES-BJT: green-polycrystalline emitter and collector, pink-base region, orange-insulating silicon dioxide); note that the junction field effect transistor [17] has the same structure; (c) 3D view of the elementary cell (with removed trench isolation in the front of view). There are two types of elementary cells in VESTIC technology: (a) a cell with a junctionless field-effect transistor (VESFET, green-polycrystalline gate area, pink-drain, source, and "channel" area, orange-insulating silicon dioxide); (b) a cell with a junction bipolar transistor (VES-BJT: greenpolycrystalline emitter and collector, pink-base region, orange-insulating silicon dioxide); note that the junction field effect transistor [17] has the same structure; (c) 3D view of the elementary cell (with removed trench isolation in the front of view).…”

Section: Vestic Bipolar Transistor Structurementioning

confidence: 99%

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VES-BJT: A Lateral Bipolar Transistor on SOI with Polysilicon Emitter and Collector

Mierzwinski

Kuźmicz

2023

Electronics

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This paper summarizes the results of investigations of bipolar transistors made in VESTIC (Vertical Slit Transistor-based Integrated Circuits) technology. This technology was proposed by W. Maly as an alternative to classical bulk CMOS technology. However, the basic VESTIC cell can be used not only to make field effect transistors but also to make bipolar transistors. Their structures differ in many ways from existing structures of bipolar transistors. The investigations reported here aim to answer the question: can VESTIC-based lateral bipolar transistors be useful as active devices, and can they be made technologically compatible with field effect VESTIC devices? The theoretical studies were followed by the fabrication and measurements of VESTIC-based p-n-p and n-p-n bipolar devices. Although the manufacturing technology available was far from optimal, working bipolar devices were obtained. The results show that VESTIC-based bipolar devices may achieve acceptable parameters if made with state-of-the-art manufacturing technology. The main outcome of the research reported in the paper is that p-n-p and n-p-n bipolar transistors with acceptable parameters may be fabricated, together with field effect devices, in VESTIC-based integrated circuits. As a result, the VESTIC technology could become the new original BiCMOS technology.

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Section: Vestic Bipolar Transistor Structurementioning

confidence: 99%

“…The field effect devices using this technology have already been investigated in theory and experiment [13][14][15][16]. These include a field effect VES-FET device and its junction counterpart, the VES-JFET [17].…”

Section: Introductionmentioning

confidence: 99%

VES-BJT: A Lateral Bipolar Transistor on SOI with Polysilicon Emitter and Collector

Mierzwinski

Kuźmicz

2023

Electronics

View full text Add to dashboard Cite

show abstract

Compact DC model of a JVeSFET transistor with reduced number of empirical parameters

Cited by 1 publication

References 5 publications

VES-BJT: A Lateral Bipolar Transistor on SOI with Polysilicon Emitter and Collector

VES-BJT: A Lateral Bipolar Transistor on SOI with Polysilicon Emitter and Collector

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