CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays

Ji, Zexi; Jung, Wanyeong; Woo, Jongchan; Sethi, Khushal; Lu, Shih-Lien; Chandrakasan, Anantha P.

doi:10.1109/a-sscc48613.2020.9336148

Cited by 3 publications

(1 citation statement)

References 6 publications

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“…However, this analysis is bounded characterized by innovative Some projects make hardware innovations to deal with lowprecision data operations related to the MAC. In [27] a shift operation is performed to extract low-precision data, and immediately after each extraction, the data are accumulated postponing 32-bits data manipulation until the accumulation is finished. The purpose of this is to avoid data transfers between registers with different data sizes.…”

Section: Functions Optimizationmentioning

confidence: 99%

A review of CNN accelerators for embedded systems based on RISC-V

Sanchez-Flores

Alvarez

Alorda

2022

2022 IEEE International Conference on Omni-Layer Intelligent Systems (COINS)

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One of the great challenges of computing today is sustainable energy consumption. In the deployment of edge computing this challenge is particularly important considering the use of embedded equipment with limited energy and computation resources. In those systems, the energy consumption must be carefully managed to operate for long periods. Specifically, for embedded systems with machine learning capabilities in the Internet of Things (EMLIoT) era, the convolutional neural networks (CNN) model execution is energy challenging and requires massive data. Nowadays, high workload processing is designed separately into a host processor in charge of generic functions and an accelerator dedicated to executing the specific task. Open-hardware-based designs are pushing for new levels of energy efficiency. For achieving energy efficiency, open-source tools, such as the RISC-V ISA, have been introduced to optimize every internal stage of the system. This document aims to compare the EMLIoT accelerator designs based on RISC-V and highlights open topics for research.

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Section: Functions Optimizationmentioning

confidence: 99%

A review of CNN accelerators for embedded systems based on RISC-V

Sanchez-Flores

Alvarez

Alorda

2022

2022 IEEE International Conference on Omni-Layer Intelligent Systems (COINS)

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Accelerators in Embedded Systems for Machine Learning: A RISCV View

Sanchez-Flores,

Alvarez,

Alorda-Ladaria

2023

2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)

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Energy and Precision Evaluation of a Systolic Array Accelerator Using a Quantization Approach for Edge Computing

Sanchez-Flores,

Fornt,

Alvarez

et al. 2024

Electronics

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This paper focuses on the implementation of a neural network accelerator optimized for speed and energy efficiency, for use in embedded machine learning. Specifically, we explore power reduction at the hardware level through systolic array and low-precision data systems, including quantized approaches. We present a comprehensive analysis comparing a full precision (FP16) accelerator with a quantized (INT16) version on an FPGA. We upgraded the FP16 modules to handle INT16 values, employing data shifts to enhance value density while maintaining accuracy. Through single convolution experiments, we assess the energy consumption and error minimization. The paper’s structure includes a detailed description of the FP16 accelerator, the transition to quantization, mathematical and implementation insights, instrumentation for power measurement, and a comparative analysis of power consumption and convolution error. Our results attempt to identify a pattern in 16-bit quantization to achieve significant power savings with minimal loss of accuracy.

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CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays

Cited by 3 publications

References 6 publications

A review of CNN accelerators for embedded systems based on RISC-V

A review of CNN accelerators for embedded systems based on RISC-V

Accelerators in Embedded Systems for Machine Learning: A RISCV View

Energy and Precision Evaluation of a Systolic Array Accelerator Using a Quantization Approach for Edge Computing

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