Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs

Zaki, Mohamed H.; Al-Sammane,; Tahar,; Bois,

doi:10.1109/famcad.2007.25

Cited by 13 publications

(8 citation statements)

References 14 publications

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“…[35], [46] analyze mixed-signal behaviors of linear-hybrid automata. Tools for translation are not provided (as in [35], [40], [45], [46]), or only for a subset (e.g. [47]).…”

Section: A Ability To Integrate In Design Flowsmentioning

confidence: 99%

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Verification and validation of AMS systems: Towards coverage of uncertainties

Grimm

Radojicic

2015

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)

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In today's systems, analog and mixed-signal (AMS) circuits are tightly interwoven with HW/SW systems and the application. Hence, a verification of the AMS part alone is not sufficient any more, in particular considering its application in Cyber-Physical Systems. In order to guarantee 'first time right', the accuracy of the models, the validation of the application fitness, and in changing, uncertain environments will become at least as important. In this paper we discuss and give an overview of methods that strive for validation of AMS systems with increased coverage. We in particular focus modeling, verification and validation of uncertainties in the context of Cyber-Physical Systems.

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“…[35], [46] analyze mixed-signal behaviors of linear-hybrid automata. Tools for translation are not provided (as in [35], [40], [45], [46]), or only for a subset (e.g. [47]).…”

Section: A Ability To Integrate In Design Flowsmentioning

confidence: 99%

“…[45] requires system modeling in the form of recurrence equations on which formal verification can be applied. In [40] mixedsignal behavior needs to be formulated in the form of SAT constraints which represent the input to NL-SMT solver.…”

Section: A Ability To Integrate In Design Flowsmentioning

confidence: 99%

Verification and validation of AMS systems: Towards coverage of uncertainties

Grimm

Radojicic

2015

2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW)

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“…fied by difference-bound matrices (polyhedra with 45 • and 90 • angles) [29], boxes computed via Taylor approximations and interval arithmetic [40], or zonotopes [3]. Another approach to explore the state space is to use SMT-based techniques, which have exponential complexity in the number of constraints, but can be made more efficient using guidance from simulations [39].…”

Section: B-3mentioning

confidence: 99%

Automated generation of hybrid system models for reachability analysis of nonlinear analog circuits

Lee

Althoff

Hoelldampf

et al. 2015

The 20th Asia and South Pacific Design Automation Conference

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Abstract-We address the problem of formally verifying nonlinear analog circuits with an uncertain initial set by computing their reachable set. A reachable set contains the union of all possible system trajectories for a set of uncertain states and as such can be used to provably check whether undesired behavior is possible or not. Our method is based on local linearizations of the nonlinear circuit, which naturally results in a piecewise-linear system. To substantially limit the number of required locations, our approach computes linearized locations on-the-fly depending on which states are reachable. We can show that without the proposed on-the-fly technique, the conversion to piecewise-linear systems is infeasible even for a few nonlinear semiconductor devices (discrete state-space explosion problem). Our method is fully automatic and only requires a circuit netlist. Piecewise-linear systems have gained popularity not only for verification, but also for accelerated simulation of nonlinear circuits. Our method provides a guaranteed bound on the number of linearization locations that have to be explicitly computed for such a nonlinear circuit.

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“…Finally, Al-Sammane et al have applied symbolic rewriting and bounded-model checking techniques to several analog verification problems [17]. Each of these tools have been used to verify several analog circuits with low-dimensional state spaces including a tunnel diode oscillators, an VCOs and Sigma-Delta modulators [9], [18]- [20].…”

Section: An Arbiter Circuitmentioning

confidence: 99%

Verifying an Arbiter Circuit

Yan

Greenstreet

2008

2008 Formal Methods in Computer-Aided Design

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Abstract-This paper presents the verification of an asynchronous arbiter modeled at the circuit level with non-linear ordinary differential equations. We use Brockett's annulus to represent the allowed families of continuous waveforms for input and output signals and show that the metastability filter of the arbiter can be understood as a "Brockett annulus transformer." Improvements to the Coho verification tool are described that reduce the over approximation errors when working with nonconvex reachable regions. The verification shows that the arbiter observes a four-phase handshake protocol with its clients and maintains mutual exclusion. We also show several liveness properties including bounded time response to uncontested requests and that grants are issued fairly.

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Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs

Cited by 13 publications

References 14 publications

Verification and validation of AMS systems: Towards coverage of uncertainties

Verification and validation of AMS systems: Towards coverage of uncertainties

Automated generation of hybrid system models for reachability analysis of nonlinear analog circuits

Verifying an Arbiter Circuit

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