Combination of TCAD and physical MOSFET model for LSI development time reduction

Ishimaru, K.; Kasai, K.; Fukaura, Y.; Okayama, Y.; Imamura, T.; Irie, Shigeo; Hirano, Tomotaka; Watanabe, K.; Ueno, M.; Hashimoto, Kohei; Matsuoka, F.

doi:10.1109/asmc.2000.902567

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072)

DOI: 10.1109/asmc.2000.902567

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Combination of TCAD and physical MOSFET model for LSI development time reduction

K. Ishimaru

K. Kasai²,

Y. Fukaura³

et al.

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Combination of TCAD and physical MOSFET model for LSI development time reduction

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