2022 IEEE International Solid- State Circuits Conference (ISSCC) 2022
DOI: 10.1109/isscc42614.2022.9731657
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COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning

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Cited by 18 publications
(2 citation statements)
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“…For example [38] embedded CIM macros into the standard memory space of a CPU. However, the further development of system-level integration starts treating CIM macros as high density processing cores at scale instead of memory banks [39,40,41,42]. Meanwhile, the emergence of digital CIM and existence of near-memory computing (NMC) completely blur the boundary between CIM macros and traditional digital architectures.…”
Section: Micro-architecture-level Cim Macrosmentioning
confidence: 99%
“…For example [38] embedded CIM macros into the standard memory space of a CPU. However, the further development of system-level integration starts treating CIM macros as high density processing cores at scale instead of memory banks [39,40,41,42]. Meanwhile, the emergence of digital CIM and existence of near-memory computing (NMC) completely blur the boundary between CIM macros and traditional digital architectures.…”
Section: Micro-architecture-level Cim Macrosmentioning
confidence: 99%
“…Nevertheless, the embedded digital circuits in the memory array tend to degrade the storage density. In addition, digital CIM works have been widely discussed in SRAM [ 6 , 7 , 8 , 9 , 10 ]. It is still rarely discussed in NVM, such as NOR Flash memory.…”
Section: Introductionmentioning
confidence: 99%