COM2 SiGe modular BiCMOS technology for digital, mixed-signal, and RF applications

Abstract

The COM2 SiGe modular BiCMOS technology has been developed to allow efficient design and manufacturing of digital, mixed-signal, and RF integrated circuits, as well as enabling system-on-chip (SOC) integration. The technology is based on the 0.16pm COM2 digital CMOS process which features 1.5V NMOS and PMOS transistors with 2.4nm gate oxide, 0.135pm gate length, and up to 7 metal levels. Technology enhancement modules including dense SRAM, SiGe NPN bipolar transistor, and a variety of passive components have been developed to allow the COM2 technology to be cost-effectively optimized for a wide range of applications.

BiCMOS technology for mixed-digital, analog, and RF applications

“…This allows for low NMOS and PMOS thresholds that facilitate operation below 1.5 V. The process also offers up to seven aluminum metal levels with tungsten plug vias (contacts) and inter-level dielectric with dielectric constants lower than traditional silicon dioxide. The high-performance 1.5-V NMOS and PMOS transistors feature 0.135-µm minimum gate length and 2.4-nm gate oxide, resulting in a ring oscillator delay of 22 ps/stage (Table 1) [3]. Table 1 also illustrates that other CMOS devices are available by employing different process modules.…”

“…The npn transistor module requires just four additional mask levels, using high-energy phosphorus implantation for the sub-collector and selective epitaxy for the SiGe base [1]- [3]. Moreover, thanks to careful management of the total thermal budget, the SiGe bipolar module does not alter the 0.14-µm digital CMOS device parameters.…”

“…The performance of both the high breakdown (collector-emitter breakdown of 3.6 V) and high speed (collector-emitter breakdown of 2.5 V) bipolar devices are shown in Table 2. The collector characteristics, including the effects of device breakdown, for the higher breakdown device are shown in Figure 10 [3]. The reduced breakdown voltage of the high-speed device is attributable to the changing implants that create a more heavily doped collector region, thereby increasing the multiplication factor at a given reverse bias.…”

“…Those circuits requiring the highest speed performance, such as CML and low-level signal processing elements like re-ceive-channel pre-amps and mixers, use the lower breakdown voltage device. An important characteristic of the speed of the device is that the f T and f max degrade at small values of V CE (Figure 11) [3]. Accordingly, care must be taken where several layers IEEE magazine of transistors are stacked.…”

“…The I B , I C , and current gain B versus V BE (Gummel Plot) are shown in Figure 12 [3] for the high breakdown voltage device. The base and collector currents both show the ideal 60-mV/decade current slope down to the pico-ampere range, resulting in a relatively con-stant current gain over a wide range of collector currents.…”