Column-Parallel Correlated Multiple Sampling Circuits for CMOS Image Sensors and Their Noise Reduction Effects

Suh, Sungho; Itoh, Susumu; Aoyama, Satoshi; Kawahito, Shoji

doi:10.3390/s101009139

Cited by 60 publications

(55 citation statements)

References 9 publications

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“…4.1. Low noise CIS readout chains may also include correlated multiple sampling (CMS) that can be implemented with analog circuitry [82,49] or performed in the digital domain after the ADC [7]. CMS consists in averaging M samples after the reset and M other samples after the transfer with a sampling period T S , then calculating the difference between the two averages.…”

Section: Noise Calculation Methodsmentioning

confidence: 99%

“…4.4. This can be implemented using a passive switched capacitors (SC) network or by using an active SC integrator [49]. The CMS can also be performed in the digital domain using registers [50,7] as shown in Fig.…”

Section: Impact Of Cms On Noisementioning

confidence: 99%

“…Correlated multiple sampling (CMS) was introduced for CIS in [47,48,49]. It combines CDS with averaging.…”

Section: Correlated Multiple Samplingmentioning

confidence: 99%

“…Thus, this configuration results in a dynamic range decrease by a factor M . An alternative to this implementation [49] consists in using folding integration by introducing a digitally assisted feedback that prevents the integrator from saturating. This implementation is obtained at the cost of additional active mixed signal circuitry.…”

Section: Analog Cmsmentioning

confidence: 99%

“…Simulation results from [91] show that thermal noise originating from the SF stage, the column-level amplifier and the current source can be reduced to about 0.2 e − rms if the bandwidth is limited to 265 kHz. Thermal noise can also be reduced using CMS at the end of the readout chain [49][82] [83] but at the cost of additional circuitry when implemented in the analog domain and multiple analog-to-digital conversions when implemented in the digital domain. It has been shown in [9] that the input-referred thermal noise can also be reduced by increasing the conversion gain of the pixel.…”

Section: Column-level Amplifiermentioning

confidence: 99%

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Ultra Low Noise CMOS Image Sensors

Boukhayma

2018

Springer Theses

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Section: Noise Calculation Methodsmentioning

confidence: 99%

Section: Impact Of Cms On Noisementioning

confidence: 99%

“…Correlated multiple sampling (CMS) was introduced for CIS in [47,48,49]. It combines CDS with averaging.…”

Section: Correlated Multiple Samplingmentioning

confidence: 99%

Section: Analog Cmsmentioning

confidence: 99%

Section: Column-level Amplifiermentioning

confidence: 99%

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Ultra Low Noise CMOS Image Sensors

Boukhayma

2018

Springer Theses

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A 1/f noise optimized correlated multiple sampling technique for complementary metal oxide semiconductor image sensor

Ya-lei

Zha

et al. 2023

Circuit Theory & Apps

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SummaryCorrelated multiple sampling (CMS) technique is often used to reduce random noise in complementary metal oxide semiconductor (CMOS) image sensor, but as the number of samples increases, the suppression of 1/f noise by standard CMS based on averaging sampling gradually decreases. Therefore, in this paper, a 1/f noise optimized correlated multiple sampling (NOCMS) technique based on differentiated sampling weights is proposed. Transfer functions of standard CMS and NOCMS for analyzing the suppression effect of random noise respectively are derived based on the Fourier transform theory. And NOCMS shows a dramatic advantage in the suppression of 1/f noise. In addition, a circuit structure based on single‐slope analog‐to‐digital converter (SSADC) for implementing NOCMS is suggested. Ramp generator provides multiple sets of ramps with different slopes to quantify the reset and signal voltages of pixel output. Sampling weights are increased with the decrease of ramp slopes. The last reset and first signal values are weighted more due to their potentially higher correlations which highlights the principle of assigning weights. Simulation results under 110 nm CMOS technology illustrate that the input‐referred random noise is 142.9 V under standard CMS and 120.9 V under NOCMS when the number of samples equals 8. The noise reduction effect is improved by 15%. NOCMS makes it possible to further reduce 1/f noise of CMOS image sensor.

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Theoretical investigation of the noise performance of active pixel imaging arrays based on polycrystalline silicon thin film transistors

et al. 2017

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Purpose Active matrix flat-panel imagers, which typically incorporate a pixelated array with one a-Si:H thin-film transistor (TFT) per pixel, have become ubiquitous by virtue of many advantages, including large monolithic construction, radiation tolerance and high DQE. However, at low exposures such as those encountered in fluoroscopy, digital breast tomosynthesis and breast computed tomography, DQE is degraded due to the modest average signal generated per interacting x-ray relative to electronic additive noise levels of ~1000 e, or greater. A promising strategy for overcoming this limitation is to introduce an amplifier into each pixel, referred to as the active pixel (AP) concept. Such circuits provide in-pixel amplification prior to readout as well as facilitate correlated multiple sampling, enhancing signal-to-noise and restoring DQE at low exposures. In this study, a methodology for theoretically investigating the signal and noise performance of imaging array designs is introduced and applied to the case of AP circuits based on low-temperature polycrystalline silicon (poly-Si), a semiconductor suited to manufacture of large area, radiation tolerant arrays. Methods Computer simulations employing an analog circuit simulator and performed in the temporal domain were used to investigate signal characteristics and major sources of electronic additive noise for various pixel amplifier designs. The noise sources include photodiode shot noise and resistor thermal noise, as well as TFT thermal and flicker noise. TFT signal behavior and flicker noise were parameterized from fits to measurements performed on individual poly-Si test TFTs. The performance of three single-stage and three two-stage pixel amplifier designs were investigated under conditions relevant to fluoroscopy. The study assumes a 20×20 cm2, 150 µm pitch array operated at 30 fps and coupled to a CsI:Tl x-ray converter. Noise simulations were performed as a function of operating conditions, including sampling mode, of the designs. The total electronic additive noise included noise contributions from each circuit component. Results The total noise results were found to exhibit a strong dependence on circuit design and operating conditions, with TFT flicker noise generally found to be the dominant noise contributor. For the single-stage designs, significantly increasing the size of the source-follower TFT substantially reduced flicker noise – with the lowest total noise found to be ~574 e [rms]. For the two-stage designs, in addition to tuning TFT sizes and introducing a low-pass filter, replacing a p-type TFT with a resistor (under the assumption in the study that resistors make no flicker noise contribution) resulted in significant noise reduction – with the lowest total noise found to be ~336 e [rms]. Conclusions A methodology based on circuit simulations which facilitates comprehensive explorations of signal and noise characteristics has been developed and applied to the case of poly-Si AP arrays. The encouraging results suggest that the elect...

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Column-Parallel Correlated Multiple Sampling Circuits for CMOS Image Sensors and Their Noise Reduction Effects

Cited by 60 publications

References 9 publications

Ultra Low Noise CMOS Image Sensors

Ultra Low Noise CMOS Image Sensors

A 1/f noise optimized correlated multiple sampling technique for complementary metal oxide semiconductor image sensor

Theoretical investigation of the noise performance of active pixel imaging arrays based on polycrystalline silicon thin film transistors

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