Code transformations for data transfer and storage exploration preprocessing in multimedia processors

Catthoor, Francky; Danckaert, Koen; Wuytack, Sven; Dutt, Nikil

doi:10.1109/54.922804

Cited by 46 publications

(18 citation statements)

References 19 publications

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“…Tiling is also a well-known technique for enhancing data locality [34,36]. Previous research [12] also discusses how code restructuring can be used for improving data locality in embedded applications. Cierniak and Li [20] were among the first to offer a scheme that unifies loop and data transformations.…”

Section: Discussion Of Related Workmentioning

confidence: 99%

Optimizing shared cache behavior of chip multiprocessors

Kandemir

Muralidhara

Narayanan

et al. 2009

Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture

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One of the critical problems associated with emerging chip multiprocessors (CMPs) is the management of on-chip shared cache space. Unfortunately, single processor centric data locality optimization schemes may not work well in the CMP case as data accesses from multiple cores can create conflicts in the shared cache space. The main contribution of this paper is a compiler directed code restructuring scheme for enhancing locality of shared data in CMPs. The proposed scheme targets the last level shared cache that exist in many commercial CMPs and has two components, namely, allocation, which determines the set of loop iterations assigned to each core, and scheduling, which determines the order in which the iterations assigned to a core are executed. Our scheme restructures the application code such that the different cores operate on shared data blocks at the same time, to the extent allowed by data dependencies. This helps to reduce reuse distances for the shared data and improves onchip cache performance. We evaluated our approach using the Splash-2 and Parsec applications through both simulations and experiments on two commercial multi-core machines. Our experimental evaluation indicates that the proposed data locality optimization scheme improves inter-core conflict misses in the shared cache by 67% on average when both allocation and scheduling are used. Also, the execution time improvements we achieve (29% on average) are very close to the optimal savings that could be achieved using a hypothetical scheme.

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Section: Discussion Of Related Workmentioning

confidence: 99%

Optimizing shared cache behavior of chip multiprocessors

Kandemir

Muralidhara

Narayanan

et al. 2009

Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture

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“…This leads to various researches and developments in dealing with the cost of the image acquisition process. These efforts include general solutions such as the development of memory hierarchy, and image specific solutions such as access pattern optimization [16], and application code rewriting [4], etc.…”

Section: Introductionmentioning

confidence: 99%

“…Without modifying the source memory from which the data are read, source-to-source code rewriting (such as Data Transfer and Storage Exploration proposed by Catthoor et al [4]) is done by compilers to transform and optimize the application code in such a way that less temporal storage (e.g. cache) and fewer memory accesses are needed to execute the code.…”

Section: Introductionmentioning

confidence: 99%

Context-based image acquisition from memory in digital systems

Liu

Bouganis

Cheung

2016

J Real-Time Image Proc

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A key consideration in the design of image and video processing systems is the ever increasing spatial resolution of the captured images, which has a major impact on the performance requirements of the memory subsystem. This is further amplified by the facts that the memory bandwidth requirements and energy consumption of accessing the captured images have started to become the bottlenecks in the design of high-performance image processing systems. Inspired by the successful application of progressive image sampling techniques in various image processing tasks, this work proposes the concept of Context-based Image Acquisition for hardware systems that efficiently trades image quality for reduced cost of the image acquisition process. Based on the proposed framework, a hardware architecture is developed which alters the conventional memory access pattern, to progressively and adaptively access pixels from a memory subsystem. The sampled pixels are used to reconstruct an approximation to the ground truth, which is stored in a high-performance image buffer for further processing. An instance of the architecture is prototyped on an FPGA and its performance evaluation shows that a saving of up to 85 % of memory accessing time and 33 %/45 % of image acquisition time/ energy are achieved on a set of benchmarks while maintaining a high PSNR.

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“…They do not study the effect of such transformations on energy consumption. Several source code transformations have also been proposed to address the data transfer and storage costs [20] and cache effects [2] in applications. …”

Section: Related Workmentioning

confidence: 99%

Energy-optimizing source code transformations for operating system-driven embedded software

Fei

Ravi

Raghunathan

et al. 2007

ACM Trans. Embed. Comput. Syst.

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The I. Introduction Limited battery life has made energy efficiency a critical issue for mobile computers and portable embedded systems, such as laptops, PDAs, cell phones, etc. Recent studies have examined the architecture of the overall system for energy saving opportunities, which consider not only hardware components for energy reduction, but also energyefficient software design and compilation [1]. Low energy software design can be performed at three levels of abstraction: instruction level, program or source-code level, and algorithm level [2]. Instruction-level techniques [3] have focused on efficient code generation for a program using energy consumption as the design metric, register allocation to minimize memory access overheads, and instruction reordering to reduce inter-instruction overheads, etc. While these approaches can be automated in the compilation process, the overall energy consumption savings is small, and is strongly tied to the processor architecture. Algorithmic approaches, on the other hand, achieve significant energy savings through careful selection of the algorithms used in the software [4], [5]. Since these approaches are mostly based on human intuition and knowledge, significant manual effort is essential for them. In contrast, program code restructuring approaches achieve the best balance between energy efficiency and automation. Their impact on energy consumption tends to be high since they work with a global view of the program. In addition, such techniques are platform-independent, making them easily portable to different architectures. In this work, we propose novel source code transformations that can reduce program energy consumption.Several source code transformations proposed for reducing software energy consumption have been surveyed in [6], [7]. These techAcknowledgments: This work was supported by DARPA under contract no. DAAB07-02-C-P302.

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Code transformations for data transfer and storage exploration preprocessing in multimedia processors

Cited by 46 publications

References 19 publications

Optimizing shared cache behavior of chip multiprocessors

Optimizing shared cache behavior of chip multiprocessors

Context-based image acquisition from memory in digital systems

Energy-optimizing source code transformations for operating system-driven embedded software

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