Code generation for accurate array redistribution on automatic distributed-memory parallelization

Abstract

Code generation belongs to the backend of parallelizing compiler, and is for generating efficient computation and communication code for the target parallel computing system. Traditional research resolve array redistribution mainly by generating communication code that each processor sends all data defined in its local memory to all processors, but this will bring large amount of communication redundancy, which increase with the growth of number of processors. Focusing on this problem, this paper presents an accurate code generation algorithm of array redistribution for distributed-memory architecture. The algorithm determines source processor and goals processor of each array element's migration in array redistribution by the transformation of data decompositions, then generate accurate communication code. The experimental results show that algorithm proposed by this paper can effectively reduce communication redundancy with the processor scale growth, and improve the parallel performance of applications.

Field modeling code generation technique for automatic parallelization mutation system

“…Therefore, physical model cannot be realized with expert manual refinement; for example, function part is distributed to different tasks and enhanced with necessary implementation details. In addition, FLP algorithm used in physical model is fixed (FXP) algorithm suitable for embedded target processor (see [5] in details). 2.…”