Code compression based on operand factorization

Abstract

This paper proposes a code compression technique called operand factorization. The central idea of operand factorization is the separation of program expression trees into sequences of tree-patterns (opcodes) and operandpatterns (registers and immediates).Using this technique, we show that tree and operand patterns have exponential frequency distributions. A set of experiments were designed to explore this feature. They reveal an average compression ratio of 43% for SPECInt95 programs. A decompression engine is proposed, which assembles tree and operand patterns into uncompressed instruction sequences. An encoding that improves the design of the decompression engine results in a 48% compression ratio. Compression ratio numbers take into consideration an estimate of the decompression engine size.

Clustering-Based Microcode Compression

“…It means that the original and the compressed microinstructions have the same address space. Therefore, different from other code compression techniques, the decompressor does not require an address translation mechanism [2], [19], [20] and the microcode does not have to be patched [4], [14].…”

“…One solution to address microcode size issues is to apply code compression techniques [2], [4], [19]. The idea is to store the microcode in a transformed representation (compressed) and decompress it during execution.…”

Compressing Functional Tests for Microprocessors

“…The instructions can be said to roughly consist of operations that are performed on a set of data. The basic idea of operand factorization [26] is to separate out the operation part of the instruction (opcodes) and the operand part of the instruction (registers and immediates). The two parts are then compressed separately.…”

“…It should be noted that software compression has been explored in the area of embedded applications [26] [27], where the code size can impact utilization of on-chip resources needed to store firmware and software programs. These techniques also rely on dedicated on-chip hardware for decompression unlike the software-based techniques proposed in this paper which entail no hardware overhead.…”

Compiler optimization and ordering effects on VLIW code compression

“…Further developments in RISC code compression developed code compression methods that looked at compiler techniques [6,7], expression trees and operand factorization [3,4], enhanced dictionary schemes and statistical schemes based on Markov models and arithmetic coding.…”