2024
DOI: 10.1016/j.applthermaleng.2024.122699
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Co-optimization of electrical-thermal–mechanical behaviors of an on-chip thermoelectric cooling system using response surface method

Tingrui Gong,
Gu Hou,
Yongjia Wu
et al.
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Cited by 3 publications
(1 citation statement)
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“…The drastic rise in chip power consumption, due to its miniaturization and high-density packaging, is a significant issue that leads to local hot spots in nanoelectronic devices [1,2]. These hot spots degrade the performance, reliability and lifetime of the devices, making it crucial to manage and mitigate thermal effects effectively [3,4]. Traditional techniques to reduce this issue, such as liquid cooling [5] or fan-based systems [6], involve the cooling of the entire chip, a procedure recognized for its substantial power consumption [7].…”
Section: Introductionmentioning
confidence: 99%
“…The drastic rise in chip power consumption, due to its miniaturization and high-density packaging, is a significant issue that leads to local hot spots in nanoelectronic devices [1,2]. These hot spots degrade the performance, reliability and lifetime of the devices, making it crucial to manage and mitigate thermal effects effectively [3,4]. Traditional techniques to reduce this issue, such as liquid cooling [5] or fan-based systems [6], involve the cooling of the entire chip, a procedure recognized for its substantial power consumption [7].…”
Section: Introductionmentioning
confidence: 99%