Co-Design for Low Warpage and High Reliability in Advanced Package with TSV-Free Interposer (TFI)

X., F.; Kawano, Motoharu; Ding, Mian Zhi; Han, Yongdian; Bhattacharya, Subhashish

doi:10.1109/ectc.2017.31

Cited by 13 publications

(2 citation statements)

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“…The voids on the copper are to reduce the metal usage. The material properties are shown in Table 1 (Che et al , 2012, 2017). To simplify the simulation, all the materials are supposed to be linearly elastic and isotropic, and the passivation layer is not included in the model because the thickness of the passivation layer is negligible compared to the other layers.…”

Section: Size and Thickness Evaluation Of Large-sized Interposermentioning

confidence: 99%

“…A large area of copper applied on the interposer is used to provide voltage bias to the front-side illumination (FSI) sensor. The voids on the copper are to reduce (Che et al, 2012(Che et al, , 2017. To simplify the simulation, all the materials are supposed to be linearly elastic and isotropic, and the passivation layer is not included in the model because the thickness of the passivation layer is negligible compared to the other layers.…”

Section: Size and Thickness Evaluation Of Large-sized Interposermentioning

confidence: 99%

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Double-sided silicon vias (DSSVs) interconnection for large-sized interposer fabrication

Yang

Dai

Cao

et al. 2023

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Purpose A large-scale detection system with more data in short time bins, small dead space and small signal identification is the ideology the scientists pursuing. These proposed demands are able to be solved by 2.5 D integration. The substance of a 2.5 D integration is called silicon interposer, which consists of the through silicon via (TSV) and redistribution layer. However, the state-of-the-art silicon interposer is not able to sustain its own mechanical strength with the detector/readout array often sitting as standalone in large science facilities and fails to reduce the expansions on the installation of the components due to its insufficient thickness and size. This study aims to propose a moderation of current interposer with large-sized, standalone properties. Design/methodology/approach This paper proposes an interposer based on double-sided silicon vias (DSSVs) interconnection. Unlike conventional interposer that is interconnected by TSVs, DSSVs interposer is interconnected by top vias (T-vias) and bottom vias (B-vias). Findings The fabrication process of DSSVs interposer is introduced, and the superiority of the double-sided interconnection process with two etch-stop layers is described in detail. The impact of different T-vias depth on DSSVs interconnections in the same wafer is discussed and two times PI opening processes are proposed to eliminate air bubbles in the B-via. The relationship between the interposer thickness and warpage is studied by finite element analysis simulation and experiment. The prototype of the DSSVs interposer with a size of 100 × 100 mm and a thickness of 318.2 µm is fabricated, and electrical tests including short tests and continuity tests are carried out. Originality/value This paper proposes a large-sized and stand-alone interposer based on DSSVs interconnection.

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Section: Size and Thickness Evaluation Of Large-sized Interposermentioning

confidence: 99%

Section: Size and Thickness Evaluation Of Large-sized Interposermentioning

confidence: 99%