CMOS microwave and millimeter-wave ICs: The historical background

Abidi, A.A.

doi:10.1109/rfit.2014.6933267

Cited by 11 publications

(4 citation statements)

References 35 publications

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“…For example, the transceivers operated in gigahertz (GHz) bands are the good candidate for the demand of faster data transmission [1]. CMOS technology is a promising way to implement the GHz integrated circuits with the advantages of high integration capability and low cost for mass production [2,3]. However, the transistors in CMOS and even FinFET technologies are inherently susceptible to the electrostatic discharge (ESD) events [4,5].…”

Section: Introductionmentioning

confidence: 99%

Low-C ESD Protection Design in CMOS Technology

Lin¹

2019

Electrostatic Discharge - From Electrical Breakdown in Micro-Gaps to Nano-Generators

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Electrostatic discharge (ESD) protection design is needed for integrated circuits in CMOS technology. The choice for ESD protection devices in the CMOS technology includes diode, MOSFET, and silicon controlled rectifier (SCR). These ESD protection devices cause signal losses at high-frequency input/output (I/O) pads due to the parasitic capacitance. To minimize the impacts from ESD protection circuit on high-frequency performances, ESD protection circuit at I/O pads must be carefully designed. A review on ESD protection designs with low parasitic capacitance for high-frequency applications in CMOS technology is presented in this chapter. With the reduced parasitic capacitance, ESD protection circuit can be easily combined or co-designed with high-frequency circuits. As the operating frequencies of high-frequency circuits increase, on-chip ESD protection designs for high-frequency applications will continuously be an important design task.

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Section: Introductionmentioning

confidence: 99%

Low-C ESD Protection Design in CMOS Technology

Lin¹

2019

Electrostatic Discharge - From Electrical Breakdown in Micro-Gaps to Nano-Generators

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“…While the first mmWave system implementations were based on gallium arsenide (GaAs), the improvement that CMOS technology brought to traditional microwave systems has recently led researchers and industry practitioners to develop CMOS subsystems for mmWave systems. Nonetheless, mmWave system design based on CMOS technology is still under ongoing investigation, as mmWave CMOS is not easily extrapolated from microwave CMOS [5]. A last challenge to take into consideration is the cost of mmWave hardware (low noise amplifiers, power amplifiers, antennas, etc.…”

Section: Introductionmentioning

confidence: 99%

Feasible Transmission Strategies for Downlink MIMO in Sparse Millimeter-Wave Channels

et al. 2018

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Addressing the disruptive capacity requirements of 5G networks calls for a thorough exploration of multiple technological solutions. Two promising approaches are i) the use of multiple-input multiple-output (MIMO) technologies that enable multiplicative capacity gains, and ii) the exploration of new frequency bands to enlarge available bandwidth. While millimeter spectrum, one of the main bands under study, poses significant challenges due to its cumbersome propagation characteristics (particularly severe path-loss and channel sparsity), its ten-fold frequency increase favors the deployment of reduced-size large antenna arrays for massive MIMO. However, the high cost and power consumption of its required signal mixers and analog-to-digital converters precludes mmWave beamforming to be performed entirely at baseband using digital precoders. A possible cost-effective alternative is the hybrid precoding transceiver architecture, which combines digital and analog precoders. In this paper, we exploit the sparse nature of the channel to unveil an advantage in the design of the hybrid precoder. Specifically, by reformulating the hybrid precoder design as a matrix factorization problem, and adopting an atomic norm minimization approach, we propose a new hybrid precoding algorithm that takes advantage of the sparse nature of the mmWave channel to approach the performance of the optimal fully-digital precoder. Simulation results confirm that the proposed algorithm can approach the performance achieved by unconstrained digital beamforming solutions.

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“…Given its circuit implementations, the technology of CMOS-integrated circuits is among the candidates because of its low supply voltage, low cost, and high integration [1].…”

Section: Introductionmentioning

confidence: 99%

Ultra-Wideband Quasi-Circulator Implemented by Cascading Distributed Balun With Phase Cancelation Technique

Tang

Lin

Hung

et al. 2016

IEEE Trans. Microwave Theory Techn.

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This paper presents the implementation of a broadband quasi-circulator through a cascading distributed balun using a 90-nm CMOS process. The isolation, |S31|, of the proposed three-port quasi-circulator can be acquired through the phase cancelation technique, by connecting an additional distributed amplifier in parallel between ports 1 and 3. The thorough analysis based on an eight-port chain matrix and scattering matrix is presented for refining the circuit parameters in the initial design. Measured results show that the proposed quasi-circulator attains a broad operation bandwidth ranging from 10 to 67 GHz. Moreover, the quasi-circulator also has good insertion gain of 0.5 to 4.8 dB, as well as isolation |S31|, which is better than 23 dB. Consequently, the proposed quasicirculator delivers wide bandwidth performance, good port-toport isolations, good insertion gain, and high linearity based on the cascading distributed balun with phase cancelation technique.

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CMOS microwave and millimeter-wave ICs: The historical background

Cited by 11 publications

References 35 publications

Low-C ESD Protection Design in CMOS Technology

Low-C ESD Protection Design in CMOS Technology

Feasible Transmission Strategies for Downlink MIMO in Sparse Millimeter-Wave Channels

Ultra-Wideband Quasi-Circulator Implemented by Cascading Distributed Balun With Phase Cancelation Technique

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