CMOS Hardness Prediction for Low-Dose-Rate Environments

Low Dose Rate Effects in Silicon Based Devices and Integrated Circuits: A Review

“…Как правило, увеличение температуры приводит к росту скорости нейтрализации накопленного заряда. Од-нако в некоторых технологических вариантах такая температурная зависимость может отсутствовать [7,32,33].…”

Temporal and Dose Kinetics of Tunnel Relaxation of Non-Equilibrium Near-Interfacial Charged Defects in Insulators

“…The asymptotic relations (18)(19) are useful for a qualitative understanding of the time dependence shapes. Exact and explicit (though cumbersome) design equations, convenient for numerical calculations are presented in Appendix D. Calculations in Fig.…”

“…Such defects are traditionally referred to as interface traps, border traps, or switching states [15,16,17,18]. Neutralization of positively charged defects in SiO 2 , located in energy below the Si valence band edge, occurs at a rate that is approximately independent of temperature and linear with logarithmic time [19,20,21,22]. This remarkable property is a direct consequence of an exponentially wide range of the tunnel relaxation times.…”

Annealing of MOS Capacitors with Implications for Test Procedures to Determine Radiation Hardness

“…1 AV(O ), has been shown to be governed by the transport of r d'ation-generated holes to the SiO2/Si interface.9 A Although most of the holes transport to the interface in times less than 1 s, significant transport can occur to much later times becauae8of the highly dispersive nature of the transport, 8 particularly at low fields, i.e., fields less than 1 MV/cm. When the holes arrive at the interface, a certain percentage are trapped and may be subsequently annealed.…”

“…For those capacitors where the effects of interface states and LNUs are small, the recovery has an approximate ln(t) dependence and will saturate at very late times (AV + 0 or some "permanent" value as Fig. 1. Annealing processes in MOS structures following pulsed irradiation.…”