CMOS-compatible ehancement-mode GaN-on-Si MOS-HEMT with high breakdown voltage (930V) using thermal oxidation and TMAH wet etching

Tang, Cen; Hou, Mingchen; Li, Xueyang; Xie, Gang; Sheng, Kuang

doi:10.1109/ecce.2015.7309715

Cited by 6 publications

(4 citation statements)

References 15 publications

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“…AFM profile along the trench window shows a slightly slope step and a very flat edge, which is comparable to etching recessed structure. 25,26) Thus the improved conductive performances in the access region would be expected.…”

Section: Separation Between 2deg Interface and Regrown Interfacementioning

confidence: 99%

“…16. 14,26,[34][35][36][37][38][39][40][41] The output properties of the Al 2 O 3 /AlN/GaN MISFET are shown in Fig. 17(a).…”

Section: Inserting In Situ Aln Interlayer To Improve Mis-gate Channel...mentioning

confidence: 99%

“…Fig.16. (Color online) Benchmark of V th hysteresis and V th for the stateof-the-art fully recessed-gate E-mode GaN MISFETs 14,26,[34][35][36][37][38][39][40][41]. …”

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confidence: 99%

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A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

Yang

Yao

et al. 2019

Jpn. J. Appl. Phys.

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Recess structure is one of the main schemes for insulated-gate E-mode GaN transistors. In this work, selective area growth (SAG) is proposed to fabricate damage-free recess-gate device, and related progresses regarding process optimization and structure evolution have been reviewed. Firstly, the SAG process has been optimized by interface separation (conduction interface and regrowth interface) and n-type Si impurity removal to achieve high-quality AlGaN/GaN heterostructure. Compared to the traditional etching method, the feasibility and superiority of SAG scheme are demonstrated for realizing E-mode Al2O3/GaN MISFET with small Vth hysteresis. Then, by inserting an in situ AlN interlayer, the SAG Al2O3/AlN/GaN MISFET yields improved frequency dispersion and gate channel conduction performances. To further enhance the channel conduction, the SAG partially recess-gate Al2O3/AlGaN/GaN MIS-HFET structure is proposed, by which both high Vth and high-field-effect channel mobility have been achieved. Those results indicate that SAG method gives a perspective way for insulated-recess-gate GaN transistors fabrication.

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Section: Separation Between 2deg Interface and Regrown Interfacementioning

confidence: 99%

“…16. 14,26,[34][35][36][37][38][39][40][41] The output properties of the Al 2 O 3 /AlN/GaN MISFET are shown in Fig. 17(a).…”

Section: Inserting In Situ Aln Interlayer To Improve Mis-gate Channel...mentioning

confidence: 99%

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A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

Yang

Yao

et al. 2019

Jpn. J. Appl. Phys.

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“…For SiO2, the breakdown voltage (BV) achieved 810 V [6], 451 V [7], and 100 V [8], while for SiNx, the BV achieved 600 V [9] and 400 V [10], respectively. The BV of SiON was 640 V [11] and 428 [12], and Al2O3 had a BV of 993 V [13] and 930 V [14]. Furthermore, with suitable designs, acceptor-like traps in the buffer can minimize leakage current and short-channel effects, which makes them crucial for device performance [15].…”

Section: Introductionmentioning

confidence: 99%

Enhanced Breakdown Voltage of AlGaN/GaN MISHEMT using GaN Buffer with Carbon-Doping on Silicon for Power Device

Naeemul Islam,

Mohamed Fauzi Packeer Mohamed,

Siti Fatimah Abd Rahman

et al. 2024

IJNeaM

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In recent years, Gallium Nitride (GaN)-based metal-insulator-semiconductor high-electron-mobility transistors (MISHEMTs) have attracted interest in high-power and high-frequency applications. The breakdown mechanism in E-mode GaN MISHEMTs with carbon doping in the GaN buffer grown on a Silicon (Si) substrate (Sub) was investigated using technology computer-aided design simulations. Results showed that GaN MISHEMTs without Si Sub had a breakdown voltage (BV) of 600 V. However, after adding Si Sub to the GaN buffer layer, the electric field (EF) increased, creating a vertical breakdown through the total buffer thickness, therefore, BV was reduced to around 240 V. On the other hand, BV is increased to approximately >1100 V, and the Electric field is reduced after employing a carbon deep acceptor with the proper doping concentration in this device. The GaN MISHEMTs with Si Sub is presented as threshold voltage +1.5 V with transconductance of 700 mS/mm, which is an excellent result compared to GaN MISHEMTs without Si Sub. Eventually, the study device depicted higher BV performance compared to other C-doped GaN HEMT devices. This suggests that the designed GaN MISHEMTs device could effectively be used in power semiconductor devices with optimum performance.

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Normally-off recessed-gate AlGaN/GaN MOS-HFETs with plasma enhanced atomic layer deposited AlO _x N _y gate insulator

Kang

Eom

Kim

et al. 2019

Semicond. Sci. Technol.

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We developed a high-quality plasma enhanced atomic layer deposited (PEALD) aluminum oxynitride (AlO x N y ) process for the metal-oxide-semiconductor (MOS) gate insulator of fully-recessed-gate AlGaN/GaN-on-Si MOS-heterojunction field-effect transistors (MOS-HFETs). It was found that the cyclic nitrogen incorporation into aluminum oxide (Al 2 O 3 ) during PEALD process improved the conduction band offset at GaN interface resulting in higher forward breakdown field strength, which also contributed to suppressed trapping effects under forward gate bias stress. Improved interface characteristics, which resulted from suppressed surface oxidation, led to significant improvement of threshold voltage stability. A low threshold voltage hysteresis of 180 mV at maximum gate sweep voltage of 10 V was obtained with AlO x N y gate insulator. The MOS channel mobility was also improved to 235 cm 2 V −1 s −1 . The fabricated fully-recessed-gate AlGaN/GaN-on-Si MOS-HFET with PEALD AlO x N y gate insulator exhibited excellent overall performances such as a threshold voltage of 3.2 V, a maximum drain current density of 481 mA mm −1 , an on/off current ratio of ∼10 10 , an ON-resistance of 12 mΩ mm, and a breakdown voltage of 1050 V.

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CMOS-compatible ehancement-mode GaN-on-Si MOS-HEMT with high breakdown voltage (930V) using thermal oxidation and TMAH wet etching

Cited by 6 publications

References 15 publications

A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

Enhanced Breakdown Voltage of AlGaN/GaN MISHEMT using GaN Buffer with Carbon-Doping on Silicon for Power Device

Normally-off recessed-gate AlGaN/GaN MOS-HFETs with plasma enhanced atomic layer deposited AlO _x N _y gate insulator

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CMOS-compatible ehancement-mode GaN-on-Si MOS-HEMT with high breakdown voltage (930V) using thermal oxidation and TMAH wet etching

Cited by 6 publications

References 15 publications

A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

A review of selective area grown recess structure for insulated-gate E-mode GaN transistors

Enhanced Breakdown Voltage of AlGaN/GaN MISHEMT using GaN Buffer with Carbon-Doping on Silicon for Power Device

Normally-off recessed-gate AlGaN/GaN MOS-HFETs with plasma enhanced atomic layer deposited AlO x N y gate insulator

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Normally-off recessed-gate AlGaN/GaN MOS-HFETs with plasma enhanced atomic layer deposited AlO _x N _y gate insulator