Clove

Katta, Naga Praveen Kumar; Ghag, Aditi; Hira, Mukesh; Keslassy, Isaac; Bergman, Aran; Kim, Changhoon; Rexford, Jennifer

doi:10.1145/3143361.3143401

Cited by 81 publications

(10 citation statements)

References 22 publications

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“…INT provides for an extensive collection of data about individual packets as they travel through the network. The analysis of this data can give valuable information about the network state allowing to trace these individual data packets [22] to detect forwarding loops and network black holes, also to enable congestion control [23] [24]. In addition, INT allows end hosts to embed instructions within the data packets called Tiny Packet Programs (TPP) [25], able to query the state of the network or even introduce changes in order to meet certain application requirements.…”

Section: In-band Network Telemetry (Int)mentioning

confidence: 99%

P4 Telemetry collector

et al. 2023

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Section: In-band Network Telemetry (Int)mentioning

confidence: 99%

P4 Telemetry collector

et al. 2023

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“…Edge based: Schemes as Presto [11], Juggler [8], LetItFlow [25], Clove [14], Hermes [27]) do not need to modify the router or the end-host. Instead, they run in the virtual switch on each server, rely on support from network feedback (e.g.…”

Section: Related Workmentioning

confidence: 99%

Mp-Hula

Benet

Kassler

Benson

et al. 2018

Proceedings of the 2018 Morning Workshop on in-Network Computing

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Datacenter networks offer a large degree of multipath in order to provide large bisectional bandwidth. The end-to-end performance is determined by the load-balancing strategy which needs to be designed to effectively manage congestion. Consequently, congestion aware load-balancing strategies such as CONGA or HULA have been designed. Recently, more and more applications that are hosted on cloud servers use multipath transport protocols such as MPTCP. However, in the presence of MPTCP, existing loadbalancing schemes including ECMP, HULA or CONGA may lead to suboptimal forwarding decisions where multiple MPTCP subflows of one connection are pinned on the same bottleneck link.In this paper, we present MP-HULA, a transport layer multi-path aware load-balancing scheme using Programmable Data Planes. First, instead of tracking congestion information for the best path towards the destination, each MP-HULA switch tracks congestion information for the best-k paths to a destination through the neighbor switches. Second, we design MP-HULA using Programmable Data Planes, where each leaf switch can identify, using P4, which MPTCP subflow belongs to which connection. MP-HULA then load-balances different MPTCP subflows of a MPTCP connection on different next hops considering congestion state while aggregating bandwidth. Our evaluation shows that MP-HULA with MPTCP outperforms HULA in average flow completion time (2.1x at 50% load, 1.7x at 80% load).

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“…Emerging Programmable Data Planes [6], PDPs, are about to break this black-box approach to data plane network functionalities. Indeed, by allowing network operators to deploy customized packet processing algorithms, PDPs are considered a key enabler of many interesting new use cases including monitoring [7], [8], traffic load-balancing [9], and many others [10]. However, little is known today about how This paper is an extended version of [1] and [2].…”

Section: Introductionmentioning

confidence: 99%

Fast ReRoute on Programmable Switches

Chiesa

Sedar

Antichi

et al. 2021

IEEE/ACM Trans. Networking

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Highly dependable communication networks usually rely on some kind of Fast Re-Route (FRR) mechanism which allows to quickly re-route traffic upon failures, entirely in the data plane. This paper studies the design of FRR mechanisms for emerging reconfigurable switches. Our main contribution is an FRR primitive for programmable data planes, PURR, which provides low failover latency and high switch throughput, by avoiding packet recirculation. PURR tolerates multiple concurrent failures and comes with minimal memory requirements, ensuring compact forwarding tables, by unveiling an intriguing connection to classic "string theory" (i.e., stringology), and in particular, the shortest common supersequence problem. PURR is well-suited for high-speed match-action forwarding architectures (e.g., PISA) and supports the implementation of a broad variety of FRR mechanisms. Our simulations and prototype implementation (on an FPGA and a Tofino switch) show that PURR improves TCAM memory occupancy by a factor of 1.5x-10.8x compared to a naïve encoding when implementing state-of-the-art FRR mechanisms. PURR also improves the latency and throughput of datacenter traffic up to a factor of 2.8x-5.5x and 1.2x-2x, respectively, compared to approaches based on recirculating packets.

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Clove

Cited by 81 publications

References 22 publications

P4 Telemetry collector

P4 Telemetry collector

Mp-Hula

Fast ReRoute on Programmable Switches

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