ClockPUF: Physical Unclonable Functions Based on Clock Networks

Abstract

Physical Unclonable Functions (PUFs) extract unique chip signatures from process variations. They are used in identification, authentication, integrity verification, and anticounterfeiting tasks. We introduce new PUF techniques that extract bits from pairwise skews between sinks of a clock network. These techniques inherit the stability of clock network, but require a return network to deliver clock pulses to a certain region, where they are compared. Our algorithms select equidistant sinks and route the return network, then derive chip-specific random bits from available data with a moderate overhead. SPICE-based evaluation of clock-PUFs using a 45nm CMOS technology validates the operability, stability, uniqueness, randomness, and their low overhead.

SuperPUF: Integrating heterogeneous Physically Unclonable Functions

“…We assume that on-chip entropy sources are represented by time-varying signals that depend on process variation, for example clock sinks in the ClockPUF [22]. Section 4 introduced ways to measure information content of such individual sources, as well as their joint information content.…”

“…Our illustrations draw on the ClockPUF infrastructure [22], which can be viewed as extracting entropy from spatially distributed sources. Section 6 describes algorithmic EDA support for SuperPUF, and Section 7 generalizes SuperPUFs further.…”

“…Introduced in [22], Clock PUFs select clock sinks and connect them to a central circuit where the skews are compared. The paths that carry the clock signals are designed to have the same delay so that ideally every signal arrives at the same time.…”

“…These sources may be sensitive to different types of variation and may be supplied by predesigned hard IP blocks. The idea to sample process variation that is sensitive to clock skew at selected spatiallydistributed clock sinks has recently appeared in ClockPUF [22]. We generalize this idea to include other sources and reduce the added overhead.…”

Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM

“…Examples of custom-circuit weak PUFs include designs based on variations in drain currents [19], stabilization of cross-coupled devices [35], stabilization of cross-coupled devices in the presence of delay variations [22], and the skewed tendencies of sense amplifiers [3]. Examples of weak PUFs utilizing variations in existing circuitry include ones based on clock skew [14,37] and random flash memory latencies [28].…”