Classification of Correlated Patterns with a Configurable Analog VLSI Neural Network of Spiking Neurons and Self-Regulating Plastic Synapses

Giulioni, Massimiliano; Pannunzi, Mario; Badoni, D.; Dante, Vittorio; Giudice, Paolo Del

doi:10.1162/neco.2009.08-07-599

Cited by 24 publications

(18 citation statements)

References 22 publications

(29 reference statements)

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“…Finally, only a small number of connections between the transition neurons and the state populations need to be specified or learned to achieve a desired functionality. This property can be useful for framing the design of learning algorithms and for reducing the number of on-chip plastic synapses required to implement autonomous learning of behaviors (7,49,50). The complexity of a learning problem is proportional to the dimensionality of the to-be-learned parameters (51).…”

Section: Discussionmentioning

confidence: 99%

Synthesizing cognition in neuromorphic electronic systems

Neftci

Binas

Rutishauser

et al. 2013

Proc. Natl. Acad. Sci. U.S.A.

127

122

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The quest to implement intelligent processing in electronic neuromorphic systems lacks methods for achieving reliable behavioral dynamics on substrates of inherently imprecise and noisy neurons. Here we report a solution to this problem that involves first mapping an unreliable hardware layer of spiking silicon neurons into an abstract computational layer composed of generic reliable subnetworks of model neurons and then composing the target behavioral dynamics as a "soft state machine" running on these reliable subnets. In the first step, the neural networks of the abstract layer are realized on the hardware substrate by mapping the neuron circuit bias voltages to the model parameters. This mapping is obtained by an automatic method in which the electronic circuit biases are calibrated against the model parameters by a series of population activity measurements. The abstract computational layer is formed by configuring neural networks as generic soft winner-take-all subnetworks that provide reliable processing by virtue of their active gain, signal restoration, and multistability. The necessary states and transitions of the desired high-level behavior are then easily embedded in the computational layer by introducing only sparse connections between some neurons of the various subnets. We demonstrate this synthesis method for a neuromorphic sensory agent that performs real-time context-dependent classification of motion patterns observed by a silicon retina.decision making | sensorimotor | working memory | analog very large-scale integration | artificial neural systems U nlike digital simulations, in which the dynamics of neuronal models are encoded and calculated on general purpose digital hardware, "neuromorphic" emulations express the dynamics of the neural systems directly on an analogous physical substrate (1). Digital simulations have the advantage that they can be exactly and reliably programmed using numerical operations of very high precision. However, they suffer the disadvantage that they are cast on abstract binary electronic circuits whose operation is entirely divorced from the physical processes being simulated. Consequently, such simulations do not readily advance our understanding of how biological neural systems are able to attain their extraordinary physical performance, using only large numbers of apparently unreliable, slow, and imprecise neural components, a problem first recognized by von Neumann more than a half century ago (2). Furthermore, the reliability of digital systems comes at high cost of the circuit complexity necessary for the orchestration of communication and processing, an overhead that declares itself also in the costs of system construction and power dissipation (3).The alternative, neuromorphic, approach to information processing strives to capture in complementary metal-oxide semiconductor (CMOS) very large-scale integration (VLSI) electronic technology the more distributed, asynchronous, and limited precision nature of biological intelligent systems (1, 4).†, ‡ Research...

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Section: Discussionmentioning

confidence: 99%

Synthesizing cognition in neuromorphic electronic systems

Neftci

Binas

Rutishauser

et al. 2013

Proc. Natl. Acad. Sci. U.S.A.

127

122

View full text Add to dashboard Cite

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“…A modified version of the STDP rule is implemented in analog VLSI on the plastic synapses of neuromorphic chips (1, 2) used in this experiment (Giulioni et al, 2009; Mitra et al, 2009). The synaptic update rule (Brader et al, 2007) adjusts the synaptic weight, or efficacy, X upon arrival of a pre-synaptic spike, depending on the instantaneous membrane potential and the internal state of the post-synaptic neuron (Fusi, 2003; Brader et al, 2007).…”

Section: Methodsmentioning

confidence: 99%

Emergent Auditory Feature Tuning in a Real-Time Neuromorphic VLSI System

Sheik¹,

Coath²,

Indiveri³

et al. 2012

Front. Neurosci.

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Many sounds of ecological importance, such as communication calls, are characterized by time-varying spectra. However, most neuromorphic auditory models to date have focused on distinguishing mainly static patterns, under the assumption that dynamic patterns can be learned as sequences of static ones. In contrast, the emergence of dynamic feature sensitivity through exposure to formative stimuli has been recently modeled in a network of spiking neurons based on the thalamo-cortical architecture. The proposed network models the effect of lateral and recurrent connections between cortical layers, distance-dependent axonal transmission delays, and learning in the form of Spike Timing Dependent Plasticity (STDP), which effects stimulus-driven changes in the pattern of network connectivity. In this paper we demonstrate how these principles can be efficiently implemented in neuromorphic hardware. In doing so we address two principle problems in the design of neuromorphic systems: real-time event-based asynchronous communication in multi-chip systems, and the realization in hybrid analog/digital VLSI technology of neural computational principles that we propose underlie plasticity in neural processing of dynamic stimuli. The result is a hardware neural network that learns in real-time and shows preferential responses, after exposure, to stimuli exhibiting particular spectro-temporal patterns. The availability of hardware on which the model can be implemented, makes this a significant step toward the development of adaptive, neurobiologically plausible, spike-based, artificial sensory systems.

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“…The neuromorphic engineering community has been building physical models of sWTA networks [109], [110], [111], attractor networks [112], [113], and plasticity mechanisms [91] that cover the full range of temporal and spatial scales described in Section IV-A for many years. For example, several circuit solutions have been proposed to implement short-term plasticity dynamics, using different types of devices and following a wide range of design techniques [114], [115], [116], [117], [118], [119]; a large set of spike-based learning circuits have been proposed to model long-term plasticity [120], [121], [122], [123], [77], [124], [125], [126], [127], [128], [91]; multiple solutions have been proposed for implementing homeostatic plasticity mechanisms [129], [130]; impressive demonstrations have been made showing the properties of VLSI attractor networks [112], [113], [23], [4]; while structural plasticity has been implemented both at the single chip level, with morphology learning mechanisms for dendritic trees [131] and at the system level, in multi-chip systems that transmit spikes using the AER protocol, by reprogramming or "evolving" the network connectivity routing tables stored in the digital communication infrastructure memory banks [132], [133]. While some of these principles and circuits have been adopted in the deep network implementations of Section II and in the large-scale neural network implementations of Section III, many of them still remain to be exploited, at the system and application level, for endowing neuromorphic systems with additional powerful computational primitives.…”

Section: Neuromorphic Circuit Implementationsmentioning

confidence: 99%

Memory and Information Processing in Neuromorphic Systems

2015

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Abstract-A striking difference between brain-inspired neuromorphic processors and current von Neumann processors architectures is the way in which memory and processing is organized. As Information and Communication Technologies continue to address the need for increased computational power through the increase of cores within a digital processor, neuromorphic engineers and scientists can complement this need by building processor architectures where memory is distributed with the processing. In this paper we present a survey of brain-inspired processor architectures that support models of cortical networks and deep neural networks. These architectures range from serial clocked implementations of multi-neuron systems to massively parallel asynchronous ones and from purely digital systems to mixed analog/digital systems which implement more biologicallike models of neurons and synapses together with a suite of adaptation and learning mechanisms analogous to the ones found in biological nervous systems. We describe the advantages of the different approaches being pursued and present the challenges that need to be addressed for building artificial neural processing systems that can display the richness of behaviors seen in biological systems.

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Classification of Correlated Patterns with a Configurable Analog VLSI Neural Network of Spiking Neurons and Self-Regulating Plastic Synapses

Cited by 24 publications

References 22 publications

Synthesizing cognition in neuromorphic electronic systems

Synthesizing cognition in neuromorphic electronic systems

Emergent Auditory Feature Tuning in a Real-Time Neuromorphic VLSI System

Memory and Information Processing in Neuromorphic Systems

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