Class-AB single-stage OpAmp for low-power switched-capacitor circuits

Sutula, Stepan; Dei, Michele; Terés, Lluís; Serra-Graells, F.

doi:10.1109/iscas.2015.7169088

Cited by 6 publications

(2 citation statements)

References 7 publications

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“…Conversely, if R is excessively high, the nodes at the drain terminals of M1 and M2 start to be affected by inertial effects, potentially compromising the OTA phase margin. The implementation in Figure 14b provides a compact realization of the principle explained in Figure 13c [90]. Devices M1, M2, M3, and M4 operate in saturation and are nominally identical, while devices M1a, M2a, M3a, M4a, M1b, and M2b typically operate in the triode region.…”

Section: Non-linear Current Mirrorsmentioning

confidence: 99%

Slew-Rate Enhancement Techniques for Switched-Capacitors Fast-Settling Amplifiers: A Review

Dei,

Gagliardi,

Bruschi

2024

Chips

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This review is aimed at the integrated circuit design community and it explores slew-rate enhancement techniques for switched-capacitor amplifiers, with a primary focus on optimizing settling time within power constraints. Key challenges are addressed, including the selection between single-stage and two-stage amplifiers, along with the utilization of advanced circuit-level techniques for slew-rate enhancement. Presently, there exists a gap in comprehensive discussion, with reliance primarily on two Figures of Merit aimed at assessing power efficiency under specific capacitive loads. However, these metrics fail to adequately assess the performance of the existing slew-rate enhancer solutions at different values of capacitive loads. As a consequence, the designer lacks clear guidelines in practical situations. This review provides a state-of-the art mapping under a figure of merit dedicated to assess the whole settling delay, and also introduces a novel performance metric which highlights the role of the circuital architectures, regardless of external operating conditions. By offering a thorough examination, this review seeks to steer future research in switched-capacitor amplifier design, thereby facilitating informed decision-making and fostering innovation in the field.

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Section: Non-linear Current Mirrorsmentioning

confidence: 99%

Slew-Rate Enhancement Techniques for Switched-Capacitors Fast-Settling Amplifiers: A Review

Dei,

Gagliardi,

Bruschi

2024

Chips

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show abstract

“…This work introduces a new family of Class-AB OTA circuits called variable-mirror amplifiers (VMAs), which are based on single-stage topologies with non-linear current mirrors. The initial idea was first presented by these authors in [23], but this paper further improves the concept by adding: extension to weak inversion operation, a new auxiliary biasing circuit for a better control of peak currents, analytical expressions of the maximum slew rate, a complete set of parametrized curves to show the design flexibility of the VMA topology and a settling time analysis to optimize its power consumption when used in SC circuits. Thanks to the proposed VMA architecture, Class-AB dynamic peak currents are fully invested in the output transistors only.…”

Section: Introductionmentioning

confidence: 99%

Variable-Mirror Amplifier: A New Family of Process-Independent Class-AB Single-Stage OTAs for Low-Power SC Circuits

Sutula

Dei

Terés

et al. 2016

IEEE Trans. Circuits Syst. I

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This paper presents a new family of Class-AB operational transconductance amplifier (OTA) circuits based on single-stage topologies with non-linear current amplifiers. The proposed variable-mirror amplifier (VMA) architecture is mainly characterized by generating all Class-AB current in the output transistors only, by exhibiting very low sensitivity to both technology and temperature deviations, and by avoiding the need for any internal frequency-compensation mechanism. Hence, this family of OTAs is well-suited for low-power switched-capacitor circuits and specifically optimized for switched-OpAmp fast onoff operation and multi-decade load-capacitance specifications. Analytical expressions valid in all regions of operation are presented to minimize VMA settling time in discrete-time circuits. Also, a complete OTA design example integrated in 0.18µm 1P6M MiM 1.8V CMOS technology is supplied with detailed simulation and experimental results. Compared to resistor-free state-of-art Class-AB OpAmp and OTA literature, the proposed architecture returns the highest measured figure-of-merit value.

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Low-power operational transconductance amplifier with slew-rate enhancement based on non-linear current mirror

Pérez-Nicoli

Veirano

Lisboa

et al. 2016

Analog Integr Circ Sig Process

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Class-AB single-stage OpAmp for low-power switched-capacitor circuits

Cited by 6 publications

References 7 publications

Slew-Rate Enhancement Techniques for Switched-Capacitors Fast-Settling Amplifiers: A Review

Slew-Rate Enhancement Techniques for Switched-Capacitors Fast-Settling Amplifiers: A Review

Variable-Mirror Amplifier: A New Family of Process-Independent Class-AB Single-Stage OTAs for Low-Power SC Circuits

Low-power operational transconductance amplifier with slew-rate enhancement based on non-linear current mirror

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