1993 Computer Architectures for Machine Perception
DOI: 10.1109/camp.1993.622469
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CISC retina vs RISC retina

Abstract: Smart retinas are devices including on the same chip both optical and processing facilities. This proximity provides advantages for compactness and communication speed between sensors and processing units. This paper presents considerations leading to a VLSI design achieved in our laboratory (previously reported in [12]) and a discussion about controlling its digital processing array.

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“…Due to the small number of clock configurations needed to operate it, its programming environment is advantageouly inspired from a RISC approach [8]. Its shortage in local memory is its major handicap.…”
Section: -Thencp Retina and Its Current Consumptionmentioning
confidence: 99%
“…Due to the small number of clock configurations needed to operate it, its programming environment is advantageouly inspired from a RISC approach [8]. Its shortage in local memory is its major handicap.…”
Section: -Thencp Retina and Its Current Consumptionmentioning
confidence: 99%