Chronos-v: a many-core high-level model with support for management techniques

Abstract

This work presents Chronos-V, a Many-Core System-on-Chip (MCSoC) that adopts abstract hardware modeling, executing the FreeRTOS Operating System (OS) at each processing element (PE). Chronos-V is a heterogeneous architecture with two regions: (i) General Purpose Processing Elements (GPPE), responsible for executing user applications; (ii) peripherals that provide IO capabilities or hardware acceleration to the system. Besides the standard goal of high-level models, design space exploration at early design stages with reduced simulation time, our goal is to advance the state-of-the-art in the MCSoC research field by proposing an architecture with hardware and software support for management techniques. As a case study, we present an ODA (Observe-Decide-Actuate) loop for thermal management, comparing it to a dark silicon patterning mapping in a platform with 196 PEs. Thermal maps show the benefits of using dynamic thermal management in terms of hotspot avoidance and temperature reduction.

Reinforcement Learning for Thermal and Reliability Management in Manycore Systems

“…Chronos-V is the reference manycore platform [49], modeled with OVP [51]. Each PE contains a scratchpad memory, one router, a network interface with DMA capability, and a RISC-V 32IM core.…”

“…The layers of our manycore model. Dotted borders indicate centralized modules, while continuous borders delineate modules replicated across the system [49] The hardware layer corresponds to the physical components. The interface between the hardware and OS layers is done through interrupt signals and Memory-Mapped Registers (MMRs).…”

“…PEs change to idle (100MHz) when no task is executed or the PE waits for communication. Modeled at an abstract level, frequency and voltage changes are simulated by modifying the simulation quantum [49].…”