Chip multithreading systems need a new operating system scheduler

Fedorova, Alexandra; Small, Christopher; Nussbaum, Daniel A.; Seltzer, Margo

doi:10.1145/1133572.1133597

Cited by 16 publications

(14 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Fedorova et al introduced using the instruction mix as a heuristic for the scheduling decisions [4]. Then, in [5] they showed that the miss rate for the second level (L2) shared cache can have the greatest negative impact on processor performance, consequently they introduced the balance-set principle for grouping all the runnable threads, such that the combined working set of each group fits in the cache.…”

Section: Literature Reviewmentioning

confidence: 99%

See 1 more Smart Citation

Reducing Shared Cache Misses via dynamic Grouping and Scheduling on Multicores

Din¹,

ElSayed²,

Talkhan³

2014

ijacsa

View full text Add to dashboard Cite

Abstract-Multicore technology enables the system to perform more tasks with higher overall system performance. However, this performance can't be exploited well due to the high miss rate in the second level shared cache among the cores which represents one of the multicore's challenges. This paper addresses the dynamic co-scheduling of tasks in multicore real-time systems. The focus is on the basic idea of the megatask technique for grouping the tasks that may affect the shared cache miss rate ,and the Pfair scheduling that is then used for reducing the concurrency within the grouped tasks while ensuring the real time constrains. Consequently the shared cache miss rate is reduced.The dynamic co-scheduling is proposed through the combination of the symbiotic technique with the megatask technique for co-scheduling the tasks based on the collected information using two schemes. The first scheme is measuring the temporal working set size of each running task at run time, while the second scheme is collecting the shared cache miss rate of each running task at run time.Experiments show that the proposed dynamic coscheduling can decrease the shared cache miss rate compared to the static one by 52%.This indicates that the dynamic coscheduling is important to achieve high performance with shared cache memory for running high workloads like multimedia applications that require real-time response and continuousmedia data types.

show abstract

Section: Literature Reviewmentioning

confidence: 99%

“…For example, scheduling T 3 in slot 4 forces T 4 and T 5 to be scheduled in slots 5 and 6, respectively. So the group deadline of a subtask T i , denoted D T i  , is the earliest time by which such a "cascade" must end.…”

Section: Pfair Schedulermentioning

confidence: 99%

Reducing Shared Cache Misses via dynamic Grouping and Scheduling on Multicores

Din¹,

ElSayed²,

Talkhan³

2014

ijacsa

View full text Add to dashboard Cite

show abstract

“…The main reported drawback is lack of scalability given by the large number of thread combinations which require analysis at each reschedule event. [6] provides a distribution heuristic based on instruction stream characteristics, which improves scheduler scalability. More detailed results for this approach are presented in [5].…”

Section: Previous Workmentioning

confidence: 99%

Dynamic power management through adaptive task scheduling for multi-threaded SIMD processors

Petrică

2012

2012 10th International Symposium on Electronics and Telecommunications

View full text Add to dashboard Cite

Power management is one of the most important issues in computer architecture today. Devices often operate on the edge of their thermal envelope and system designers must balance the power consumption of various system components in order to ensure safe operation. This paper proposes an adaptive scheduler for a multi-threaded SIMD processor which is able to trade performance for power consumption in order to stay within a given power budget. By moving threads between processor cores, the scheduler is able to create more opportunity for the use of agressive power management techniques like clock gating. Evaluation shows the proposed algorithm enables more power savings than frequency scaling for various synthetic workloads.

show abstract

“…With the introduction of multi-core processors for servers and desktops, it was noted that a new operating system design is needed to fully appreciate and utilize the shared resources available on the processing cores [1]. Various aspects of shared resources require consideration; such as sharing of caches and also memory controllers within the processing cores.…”

Section: Introductionmentioning

confidence: 99%

An Adaptive Task-Core Ratio Load Balancing Strategy for Multi-core Processors

Tan¹,

Chai²,

Hoong³

2011

IJCEE

View full text Add to dashboard Cite

Abstract-With the proliferation of multi-core processors in servers, desktops, game consoles, mobile phones and a magnitude of other embedded devices; the need to ensure effective utilization of the processing cores becomes essential. This calls for research and development emphasis for a well engineered operating systems load balancer for these multi-core processors. In this paper, an adaptive load balancing strategy is presented. The adaptive load balancer will trigger tasks migration based on the tasks to processing core ratio, as well as when a processing core becomes idle. In our work, we utilize LinSched, a Linux operating system scheduler simulator, to analyze the number of task migrations. The Linux operating system is representative of the whole spectrum of computing as it is used in supercomputers, servers, desktops, mobile phones and embedded devices. Results from the simulation show that unnecessary task migrations were eliminated whilst maintaining the load balancing function effectively, as compared to the default strategy employed by the Linux operating system. The overheads introduced by the adaptive load balancer were measure through implementing it in a Linux kernel and measurements were made using the hackbench scalability test. The implementation proves to have negligible effect on the scalability and we can conclude that it does not introduce overheads. From our research, it shows that the adaptive load balancer provides a scalable solution for a lower and more consistent triggering of task migrations.

show abstract

Chip multithreading systems need a new operating system scheduler

Cited by 16 publications

References 12 publications

Reducing Shared Cache Misses via dynamic Grouping and Scheduling on Multicores

Reducing Shared Cache Misses via dynamic Grouping and Scheduling on Multicores

Dynamic power management through adaptive task scheduling for multi-threaded SIMD processors

An Adaptive Task-Core Ratio Load Balancing Strategy for Multi-core Processors

Contact Info

Product

Resources

About