Charging Effect on Electrical Characteristics of MOS Structures with Si Nanocrystal Distribution in Gate Oxide

Liu, Y.; Chen, T. P.; Ng, C. Y.; Tse, Man Siu; Fung, S.; Liu, Y. C.; Li, Shoujie; Zhao, Peng

doi:10.1149/1.1736593

Cited by 31 publications

(35 citation statements)

References 13 publications

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“…Indeed, for such MOS structures, some interesting phenomena have been observed. In a previous study, 12 it was shown that charging in the nc-Si leads to a change in both the gate current and the MOS capacitance, and the change in the oxide conduction is explained by the change in the nc-Si tunneling paths due to charging/discharging in the nc-Si. In the present study, it will be shown that the capacitance can be reduced to an extremely low level by charging up the nc-Si with either a positive or a negative gate bias.…”

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confidence: 98%

Modulation of Capacitance Magnitude by Charging/Discharging in Silicon Nanocrystals Distributed Throughout the Gate Oxide in MOS Structures

Chen

Liu

et al. 2005

Electrochem. Solid-State Lett.

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In this work, charge trapping in silicon nanocrystals ͑nc-Si͒ distributed throughout the gate oxide in a metal oxide semiconductor ͑MOS͒ structure has been studied. This situation is different from the conventional one with nc-Si confined in a narrow layer embedded in the gate oxide. In the latter, charge trapping in nc-Si leads to a shift in capacitance-voltage characteristic ͑i.e., a change in the flat-band voltage͒. In contrast, in the former the charge trapping leads to a dramatic reduction in the MOS capacitance. The original capacitance could be recovered after the release of the trapped charges by a small bias, UV light illumination, or low-temperature thermal annealing.Silicon nanocrystals ͑nc-Si͒ embedded in gate oxide of metal oxide semiconductor ͑MOS͒ structures are expected to play an important role in memory devices due to the nanocrystals unique charging and discharging effect. [1][2][3][4][5][6][7][8][9][10][11] Charging and discharging in nc-Si are indeed very important as they are directly related to data storage/retention in the memory cells. For memory applications, the nanocrystals are normally confined in a narrow layer embedded in the gate dielectrics near the Si substrate. 9-11 However, it would be interesting to examine the charging and discharging in the nc-Si that distributes throughout the gate dielectrice specially with the nc-Si peak concentration located near the gate. For the MOS structures with such an nc-Si distribution, charging and discharging of the nc-Si are expected to occur easily and thus they will have a significant impact on the electrical characteristics of the MOS structures. Indeed, for such MOS structures, some interesting phenomena have been observed. In a previous study, 12 it was shown that charging in the nc-Si leads to a change in both the gate current and the MOS capacitance, and the change in the oxide conduction is explained by the change in the nc-Si tunneling paths due to charging/discharging in the nc-Si. In the present study, it will be shown that the capacitance can be reduced to an extremely low level by charging up the nc-Si with either a positive or a negative gate bias. Furthermore, the original capacitance can be recovered by discharging the nanocrystals with a small opposite gate bias, ultraviolet ͑UV͒ illumination, or even a low-temperature ͑100°C͒ heating. The modulation of the capacitance magnitude by charging/discharging in the nc-Si provides the possibility of memory devices application.To fabricate the MOS structures with nc-Si distributed throughout the gate oxide with its peak concentration located near the gate, a 30 nm SiO 2 film was thermally grown on p-type ͑100͒ Si wafers in dry oxygen at 950°C. Then Siϩ ions with the dose of 3 ϫ 10 16 cm Ϫ2 were implanted to the SiO 2 at 14 keV. From the transport and range of ions in matter ͑TRIM͒ simulations, the peak concentration was estimated to be at the depth of ϳ20 nm. Thermal annealing was carried out at 1000°C in N 2 ambient for 1 h to induce nc-Si formation. The annealing can also eliminate ...

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confidence: 98%

Modulation of Capacitance Magnitude by Charging/Discharging in Silicon Nanocrystals Distributed Throughout the Gate Oxide in MOS Structures

Chen

Liu

et al. 2005

Electrochem. Solid-State Lett.

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“…Some MIS structures experience significantly reduced C in the accumulation region, an effect caused by charging Si nanocrystals at increased gate voltage [5,6]. In the accumulation region, almost all the applied voltage drops in the insulator.…”

Section: Resultsmentioning

confidence: 99%

Nanocomposite SiO2(Si) films as a medium for non-volatile memory

Bratus

Еvtukh

Ievtukh

et al. 2008

Journal of Non-Crystalline Solids

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“…The conduction enhancement with the increasing implanted Si ion dose can be explained with the current conduction model for the SiO 2 film distributed with nc-Si proposed in Ref. [33]. Electron tunneling can take place between adjacent neutral nanocrystals, and many such nanocrystals form conduction paths in the nc-Si embedded oxide region.…”

Section: Methodsmentioning

confidence: 94%

Influence of nanocrystal distribution on electroluminescence from Si⁺-implanted SiO 2 thin films

et al. 2008

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Light emitting diodes (LEDs) based on a metal-oxide-semiconductor-like (MOS-like) structure with Si nanocrystals (ncSi) embedded in SiO 2 have been fabricated with low-energy ion implantation. Under a negative gate voltage as low as ~-5 V, both visible and infrared (IR) electroluminescence (EL) have been observed at room temperature. The EL spectra are found to consist of four Gaussian-shaped luminescence bands with their peak wavelengths at ~460, ~600, ~740, and ~1260 nm, in which the ~600-nm band dominants the spectra. The EL properties have been investigated together with the current transport properties of the Si + -implanted SiO 2 films. A systematic study has been carried out on the effect of the Si ion implantation dose and the energy on both the current transport and EL properties. The mechanisms of the origin of the four different EL bands have been proposed and discussed.

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Charging Effect on Electrical Characteristics of MOS Structures with Si Nanocrystal Distribution in Gate Oxide

Cited by 31 publications

References 13 publications

Modulation of Capacitance Magnitude by Charging/Discharging in Silicon Nanocrystals Distributed Throughout the Gate Oxide in MOS Structures

Modulation of Capacitance Magnitude by Charging/Discharging in Silicon Nanocrystals Distributed Throughout the Gate Oxide in MOS Structures

Nanocomposite SiO2(Si) films as a medium for non-volatile memory

Influence of nanocrystal distribution on electroluminescence from Si⁺-implanted SiO 2 thin films

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Charging Effect on Electrical Characteristics of MOS Structures with Si Nanocrystal Distribution in Gate Oxide

Cited by 31 publications

References 13 publications

Modulation of Capacitance Magnitude by Charging/Discharging in Silicon Nanocrystals Distributed Throughout the Gate Oxide in MOS Structures

Modulation of Capacitance Magnitude by Charging/Discharging in Silicon Nanocrystals Distributed Throughout the Gate Oxide in MOS Structures

Nanocomposite SiO2(Si) films as a medium for non-volatile memory

Influence of nanocrystal distribution on electroluminescence from Si+-implanted SiO 2 thin films

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Influence of nanocrystal distribution on electroluminescence from Si⁺-implanted SiO 2 thin films