Charge trapping in ultrathin hafnium silicate/metal gate stacks

Srinivasan, P.; Chowdhury, N. A.; Misra, D.

doi:10.1109/led.2005.859677

Cited by 18 publications

(12 citation statements)

References 12 publications

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“…The approximately logarithmic time dependence can be explained by a spatial distribution of the trapped electrons in the dielectric. 6 After 2000 s stress, a −2.5 V voltage was applied for 2 s and V th was recovered to its original value. Then, it was restressed at 2 V. The ⌬V th trace of the second stress almost follows that of the first stress except a slight deviation at the early stage.…”

mentioning

confidence: 99%

Electron detrapping characteristics in positive bias temperature stressed n-channel metal-oxide-semiconductor field-effect transistors with ultrathin HfSiON gate dielectrics

Zhu

Nakajima

2007

Applied Physics Letters

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Articles you may be interested inInvestigation of abnormal negative threshold voltage shift under positive bias stress in input/output n-channel metal-oxide-semiconductor field-effect transistors with TiN/HfO2 structure using fast I-V measurement Appl. Phys. Lett.Hot carrier effect on gate-induced drain leakage current in high-k/metal gate n-channel metal-oxidesemiconductor field-effect transistors Appl. Phys. Lett. 99, 012106 (2011); 10.1063/1.3608241 Impact of static and dynamic stress on threshold voltage instability in high-k/metal gate n-channel metal-oxidesemiconductor field-effect transistors Appl. Phys. Lett. 98, 092112 (2011); 10.1063/1.3560463 Influence of bulk bias on negative bias temperature instability of p -channel metal-oxide-semiconductor fieldeffect transistors with ultrathin SiON gate dielectrics J. Appl. Phys. 99, 064510 (2006); 10.1063/1.2183409Low-frequency noise characteristics of HfSiON gate-dielectric metal-oxide-semiconductor-field-effect transistors

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confidence: 99%

Electron detrapping characteristics in positive bias temperature stressed n-channel metal-oxide-semiconductor field-effect transistors with ultrathin HfSiON gate dielectrics

Zhu

Nakajima

2007

Applied Physics Letters

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“…Another possible explanation of the voltage shift is the creation of negatively charged traps in the oxide. [36][37][38] The voltage span between sequence 1 and 6 in the inset of Fig. 4 corresponds to an elementary oxide charge density of 4 ϫ 10 12 cm −2 .…”

Section: Resultsmentioning

confidence: 99%

Characterization of Traps in the Transition Region at the HfO[sub 2]∕SiO[sub x] Interface by Thermally Stimulated Currents

Raeissi

Piscator

Chen

et al. 2011

J. Electrochem. Soc.

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Thermally stimulated currents ͑TSCs͒ have been measured to investigate electron traps in HfO 2 prepared by reactive sputtering on silicon. Broken planes of the silicon crystal, which may contribute to the occurrence of interface states, were identified between the silicon and SiO x interlayer by transmission electron microscopy ͑TEM͒. A second domain was found between SiO x and HfO 2 constituting a gradual transition region between the two oxides. This interface region was found to be a source of unstable charge traps where captured electrons interact with the silicon energy states through a combined tunneling and thermal process.

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“…V fb could be positive or negative for both the devices. Equation 8gives the oxide voltage as: (9) and analyze the effect of the individual terms on the charges at the gate. We know that for a MOS device,…”

Section: A Average Oxide Voltage In Mos Devices and The Corrected Slmentioning

confidence: 99%

“…They contain traps in the bulk that causes Poole-Frenkel conduction at intermediate oxide fields of 5-7 MV/cm [7,8]. The traps in the oxide trap electrons under voltage or current stress and shift the threshold voltage of the MOSFET device [9]. There is constant research into making these oxides amorphous and free of bulk traps to make them suitable as electronic materials.…”

Section: Introductionmentioning

confidence: 99%

BOEMDET-Band Offsets and Effective Mass Determination Technique applied to MIS devices on silicon to obtain the unknown bandgap of insulators

Chanana¹

2014

IOSRJAP

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The Fowler-Nordheim carrier tunneling slope constants for electron and hole conduction through MOS devices fabricated on silicon substrate can be utilized to determine the conduction and valence band offsets, carrier effective masses in the SiO 2 and its unknown bandgap, independent of photoemission spectroscopic measurements of band offsets on SiO 2 /Si samples. The slope constants can be obtained from the electron and hole tunneling currents versus oxide voltage characteristics on a pair of n-MOS and p-MOS devices in accumulation. This characterization technique called BOEMDET, can be applied to other insulating materials grown or deposited on silicon, such as jet vapor deposited (JVD) nitride, HfSiON, SiO x N y , AlN, BN, high-K oxides, and transparent conducting oxides (TCO).

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Charge trapping in ultrathin hafnium silicate/metal gate stacks

Abstract: Index Terms-Charge pumping, charge trapping, hafnium silicate, high-, metal gate, substrate injection.

Cited by 18 publications

References 12 publications

Electron detrapping characteristics in positive bias temperature stressed n-channel metal-oxide-semiconductor field-effect transistors with ultrathin HfSiON gate dielectrics

Electron detrapping characteristics in positive bias temperature stressed n-channel metal-oxide-semiconductor field-effect transistors with ultrathin HfSiON gate dielectrics

Characterization of Traps in the Transition Region at the HfO[sub 2]∕SiO[sub x] Interface by Thermally Stimulated Currents

BOEMDET-Band Offsets and Effective Mass Determination Technique applied to MIS devices on silicon to obtain the unknown bandgap of insulators

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