Charge-trap memory device fabricated by oxidation of Si/sub 1-x/Ge/sub x/

King, Ya‐Chin; King, Tsu‐Jae; Hu, Chenming

doi:10.1109/16.915694

Cited by 224 publications

(61 citation statements)

References 13 publications

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“…10 A main advantage of these embedded storage elements is the flexibility of their density, shape, size, and type, which can be easily controlled to lead to new structures and different impacts on the memory device. [11][12][13][14][15] Many types of metallic nanoparticles have been used as charge storage elements in memory devices, such as silver (Ag), gold (Au), copper (Cu), and aluminum (Al). [12][13][14][15][16][17][18][19][20][21][22][23] Au nanoparticles have attracted a wide share of research attention due to their high work function and chemical stability characteristics compared with other metal nanoparticles.…”

Section: Introductionmentioning

confidence: 99%

Electrical Characteristics of Hybrid-Organic Memory Devices Based on Au Nanoparticles

Nejm

Ayesh

Zeze

et al. 2015

Journal of Elec Materi

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We report on the fabrication and characterization of hybrid-organic memory devices based on gold (Au) nanoparticles that utilize metal-insulator-semiconductor structure. Au nanoparticles were produced by sputtering and inertgas condensation inside an ultrahigh-vacuum compatible system. The nanoparticles were self-assembled on a silicon dioxide (SiO 2 )/silicon (Si) substrate, then coated with a poly(methyl methacrylate) (PMMA) insulating layer. Aluminum (Al) electrodes were deposited by thermal evaporation on the Si substrate and the PMMA layer to create a capacitor. The nanoparticles worked as charge storage elements, while the PMMA is the capacitor insulator. The capacitance-voltage (C-V) characteristics of the fabricated devices showed a clockwise hysteresis with a memory window of 3.4 V, indicative of electron injection from the top Al electrode through the PMMA layer into Au nanoparticles. Charge retention was measured at the stress voltage, demonstrating that the devices retain 94% of the charge stored after 3 h of continuous testing.

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Section: Introductionmentioning

confidence: 99%

Electrical Characteristics of Hybrid-Organic Memory Devices Based on Au Nanoparticles

Nejm

Ayesh

Zeze

et al. 2015

Journal of Elec Materi

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“…King et al produced similar memory structures by oxidizing through an implanted SiGe layer in silicon. 8 The wet oxidation at 710 C has been identified in tests as the process with the lowest possible temperature that still results in an acceptable oxide quality and a high enough thickness. After oxidation, the wafer top sides are covered by aluminum layers, which are structured using lithography and a PNA etch.…”

Section: Methodsmentioning

confidence: 99%

Metal-oxide-semiconductor diodes containing C60 fullerenes for non-volatile memory applications

Beckmeier

Baumgärtner

2013

Journal of Applied Physics

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For non-volatile memories, silicon-oxide-nitride-oxide-silicon or floating gate structures are used to store information by charging and discharging electronic states reversibly. In this article, we propose to replace the floating gate by C60 molecules. This would allow more defined programming voltages because of the discrete molecular energy levels and a higher resistance to tunneling oxide defects because of the weak electrical connection between the single molecules. Such C60 MOS diode structures are produced and their electrical properties are analyzed regarding current transport and charging mechanism of the molecules. To create the MOS structures, C60 molecules (5% of a monolayer) are evaporated onto a part of a clean silicon wafer and covered by amorphous silicon in situ in an ultra high vacuum system. Then the wafer is oxidized in wet atmosphere at just 710 °C through the C60 layer. The goal is to produce a clean oxide above and under the molecules without destroying them. Aluminum gate contacts are defined on top of these layers to perform complementary capacitance voltage (CV) and current voltage (IV) measurements. First, the gate voltage is swept to analyze the injection current, then CV measurements are performed after each sweep to analyze the charge state of the C60 layer and the oxide quality. Reference diodes without C60 on the same wafer show an identical Fowler-Nordheim (FN) tunneling behavior for currents injected from silicon or from aluminum, respectively. In the CV curves, no pronounced flatband voltage shift is observable. In diodes with C60, for negative gate voltages, a classical FN tunneling is observed and compared to theory. The electron injection from silicon shows a different tunneling current behavior. It starts at a lower electric field and has a smaller slope then a FN current would have. It is identified as a trap-assisted tunneling (TAT) current caused by oxidation-induced traps under the C60 layer. It is modeled by an established analytic TAT model which reproduces the data with a trap energy of 1.8 eV below the oxide conduction band. In the CV measurements the negative voltage IV sweeps result in a shift of the flatband voltages to more negative values. Positive voltage IV sweeps shift the CV curves back onto the starting curves. This proves positive charge trapping in the oxide which results in a non-volatile memory behavior for the diodes with C60.

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“…In order to overcome those problems, recent research has focused on developing discrete charge trapping sites, including charge-trap dielectrics, such as silicon-oxide-nitride-oxide-silicon (SONOS) [22–25] and organic electrets [16] or nanocrystal (NC)-embedded dielectric layers, i.e., nano-floating-gate (NFG) memory devices with metal nanoparticles (NPs) and organic/inorganic nano-materials [26–28]. Compared to the conventional floating-gate cells, NFG memory generally shows better endurance, smaller chip size, multi-level capability, and lower power consumption; thus, this architecture of devices has become the leading technology in the state-of-the-art silicon-based flash memory industry.…”

Section: Introductionmentioning

confidence: 99%

Organic nano-floating-gate transistor memory with metal nanoparticles

2016

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Organic non-volatile memory is advanced topics for various soft electronics applications as lightweight, low-cost, flexible, and printable solid-state data storage media. As a key building block, organic field-effect transistors (OFETs) with a nano-floating gate are widely used and promising structures to store digital information stably in a memory cell. Different types of nano-floating-gates and their various synthesis methods have been developed and applied to fabricate nanoparticle-based non-volatile memory devices. In this review, recent advances in the classes of nano-floating-gate OFET memory devices using metal nanoparticles as charge-trapping sites are briefly reviewed. Details of device fabrication, characterization, and operation mechanisms are reported based on recent research activities reported in the literature.

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Charge-trap memory device fabricated by oxidation of Si/sub 1-x/Ge/sub x/

Cited by 224 publications

References 13 publications

Electrical Characteristics of Hybrid-Organic Memory Devices Based on Au Nanoparticles

Electrical Characteristics of Hybrid-Organic Memory Devices Based on Au Nanoparticles

Metal-oxide-semiconductor diodes containing C60 fullerenes for non-volatile memory applications

Organic nano-floating-gate transistor memory with metal nanoparticles

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