Charge pump boost converter with PLL using compensator technique

Nagarajan, V.; Bapi, Raju S.

doi:10.1109/iccsp.2016.7754112

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2017

2023

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Cited by 4 publications

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“…Mr. Vishwanath Muddi et al (2015), designed current starved voltage controlled oscillator for PLL and implement using Cadence [9]. V. Nagarajan, B. Raju, (2016), designed charge-pump boost converter with PLL using compensator techniques [10]. Bhavana Goyal et al (2016), designed charge pump PLL using improved performance ring VCO, which shows better performance in terms of power consumption, tuning range [11].…”

Section: Literature Reviewmentioning

confidence: 99%

Design and Implementation of DPLL Using Microwind 3.1 Software

Deshmukh¹,

Dandare²

2017

IJARCSSE

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Abstract-Digital Phase locked loop (DPLL) is one of the most important devices in almost all the electronic systems. This paper introduces the design of DPLL using sub-micron 45nm CMOS technology and implemented using microwind 3.1 software. The Software microwind 3.1 is used to design and simulate an integrated circuit at physical description level. Two different frequencies are generated at different voltages and it is observed that as supply voltage reduces power consumption also reduces.

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