Charge-gain program disturb mechanism in split-gate flash memory cell

Markov, V.; Korablev, K.; Kotov, Alexander; Liu, X.; Jia, Y. B.; Dang, Tengfei; Levi, A.

doi:10.1109/irws.2007.4469219

Cited by 9 publications

(5 citation statements)

References 8 publications

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“…The embedded SuperFlash (ESF) memory was introduced in high-volume production in the 90s by SST ® (ESF1) [4] as a stored charge-based memory technology alternative to the conventional floating gate (FG) one. ESF technology exhibits high injection efficiency, fast operations, over-erase immunity and improved reliability [5][6][7]. To achieve both short time-to-program (T2P) and high injection efficiency (η), ESF cells programing is based on the source side injection (SSI) mechanism [8][9][10].…”

Section: Introductionmentioning

confidence: 99%

Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

Mazzetta

Irrera

2021

Electronics

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A theoretical study of the influence of word line and common source electrodes on the program operation in shrank SuperFlash memory is proposed. Numerical simulations demonstrate that the literature model defined for previous nodes is not always suitable, due to the continuous cell physical size reduction and to the consequent increment of capacitive coupling between the floating gate and adjacent electrodes. To get a deeper insight, an analytical model of the electric field in the region of source side injection is proposed. This model describes the impact of the cell physical and electrical parameters on the vertical and horizontal field components and highlights the strong dependence of the carrier injection on the technology node. Furthermore, the numerical and analytical models estimate the influence of the word line and common source electrodes on the time-to-program, the floating gate potential and the source side injection efficiency, taking into consideration, at the same time, their possible impact on the cell reliability.

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Section: Introductionmentioning

confidence: 99%

Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

Mazzetta

Irrera

2021

Electronics

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“…[10][11][12][13][14] To meet its customized requirement, such as those for mobile or automotive application, the optimization of processes has been extensively discussed. [15][16][17][18][19][20][21][22][23][24][25] Recently, the development of the split gate has focused on a 3-poly structure, which has the advantages of low power and high coupling ratio. [25][26][27][28][29][30][31] By applying high voltage on an additional-assistance 3-poly gate, these sidewall split gate flashes can have a high coupling ratio and a low junction leakage as well.…”

Section: Introductionmentioning

confidence: 99%

“…This induces possible tail bit failure in memory arrays. 20) In this study, we propose a novel split gate flash cell consisting of a pair of floating gates with a symmetric arrangement in structure. This symmetric structure of the unit cell enable our cell to be easily arranged as a high-density AND-type array.…”

Section: Introductionmentioning

confidence: 99%

“…Compared with the previous art of split gates, this cell has a larger effective channel length, including the dual floating gates length and select gate length, which can easily suppress row disturbance issue induced by punch-through. 20) By contrast, despite the increase in gate length, dual independent floating gates can realize a 2 bits/cell storage capability. By shielding the floating gate on the unselected side, reverse read can sense dual floating gates individually.…”

Section: Introductionmentioning

confidence: 99%

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A novel high-density embedded AND-type split gate flash memory

Shen

Wang

Pan

et al. 2014

Jpn. J. Appl. Phys.

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High-β spherical tokamak (ST) plasma conditions cut off propagation of electron cyclotron (EC) waves used for heating and current drive in conventional aspect ratio tokamaks. The electron Bernstein wave (EBW) has no density cutoff and is strongly absorbed and emitted at the EC harmonics, allowing EBWs to be used for heating and current drive in STs. However, this application requires efficient EBW coupling in the high-β, H-mode ST plasma regime. EBW emission (EBE) diagnostics and modelling have been employed on the National Spherical Torus Experiment (NSTX) to study oblique EBW to O-mode (B-X-O) coupling and propagation in H-mode plasmas. Efficient EBW coupling was measured before the L-H transition, but rapidly decayed thereafter. EBE simulations show that EBW collisional damping prior to mode conversion (MC) in the plasma scrape off reduces the coupling efficiency during the H-mode phase when the electron temperature is less than 30 eV inside the MC layer. Lithium evaporation during H-mode plasmas was successfully used to reduce this EBW collisional damping by reducing the electron density and increase the electron temperature in the plasma scrape off. Lithium conditioning increased the measured B-X-O coupling efficiency from less than 10% to 60%, consistent with EBE simulations.

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“…The second concern comes from the program disturb effects in conventional AND-type virtual ground configuration. During programming operation, cells belonging to the same selected buried diffusion BL pair and CG pair as the selected cell are only deselected by SG bias and would suffer serious punchthrough (PT) [12] and reverse-tunneling (RT) disturb effects [13].…”

mentioning

confidence: 99%

A Highly Reliable 2-Bits/Cell Split-Gate Flash Memory Cell With a New Program-Disturbs Immune Array Configuration

Fang

Zhang

et al. 2014

IEEE Trans. Electron Devices

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A highly reliable 2-bits/cell split-gate flash memory cell in a novel program-disturbs immune array architecture is fabricated and demonstrated. Using a novel metal interconnect technique, a new virtual-ground array architecture is realized to greatly improve program disturbs as compared with conventional AND-type configuration. A fully self-aligned process with shallow trench isolation in cell array is also proposed for the first time to fabricate this word-line shared split-gate structure without any lithomisalignment issue. Moreover, the negative charge trap in select gate (SG) oxide during conventional poly-to-poly FowlerNordheim tunneling erase operation is found as an important contribution to the cycling degradation for cells with thin SG oxide, and a negative control gate bias erase scheme is then presented to enhance the endurance reliability in this paper. A 250-°C baking experiment (before and after cycling) is performed to explore this cell's data retention characteristics, proving the free of extrinsic and intrinsic defect. Erase and program characteristics are comparable with conventional splitgate cell as well.Index Terms-2-bits/cell, flash memory, Fowler-Nordheim (FN) tunneling, metal interconnect (MIC), self-aligned, source side injection (SSI), split-gate, virtual-ground.

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Charge-gain program disturb mechanism in split-gate flash memory cell

Cited by 9 publications

References 8 publications

Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

A novel high-density embedded AND-type split gate flash memory

A Highly Reliable 2-Bits/Cell Split-Gate Flash Memory Cell With a New Program-Disturbs Immune Array Configuration

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