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2021
DOI: 10.1109/tie.2020.2972454
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Characterization of Time Delay in Power Hardware in the Loop Setups

Abstract: The testing of complex power components by means of power hardware in the loop (PHIL) requires accurate and stable PHIL platforms. The total time delay typically present within these platforms is commonly acknowledged to be an important factor to be considered due to its impact on accuracy and stability. However, a thorough assessment of the total loop delay in PHIL platforms has not been performed in the literature. Therefore, time delay is typically accounted for as a constant parameter. However, with the de… Show more

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Cited by 29 publications
(40 citation statements)
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References 32 publications
(28 reference statements)
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“…6) Time Delay Determination and Compensation: The exchange of interface signals between the two subsystems introduces delay. In monolithic PHIL setups, the delay is variable yet deterministic [47]. However, for GDS setups where communication is over the Internet, the delay is non-deterministic and time varying.…”
Section: Communicationsmentioning
confidence: 99%
See 2 more Smart Citations
“…6) Time Delay Determination and Compensation: The exchange of interface signals between the two subsystems introduces delay. In monolithic PHIL setups, the delay is variable yet deterministic [47]. However, for GDS setups where communication is over the Internet, the delay is non-deterministic and time varying.…”
Section: Communicationsmentioning
confidence: 99%
“…Interface Algorithm [30] A review and comparison of IAs [31] Voltage-current decoupling pattern IA [12] Extension of IA proposed in [30] with capability to handle missing data [34] Generalized coupling scheme IA [35] ITM IA [15] Use [9] Platform that supported orchestration of experiments across multiple RIs [26] Open source orechestrator platform JaN-DER [29] Latency analysis of JaNDER [13] Requirements of orchestrator platform [19] Open source orchestrator platform VILLAS [44] Improvements to VILLAS platform reported [36] VILLAS platform for FPGA developed Cyber-Security [19] Analysis of impact of VPN on latency Time Delay Compensation [47] Time delay characterization of PHIL [48] Lead filter compensation [20] Delay compensation with linear predictor [49] Phase-shift delay compensation [28] Estimator-based delay compensation IV. CASE STUDIES In this section, four selected case studies, encompassing different geographical, taxonomical, and technological options are presented.…”
Section: Interfacementioning
confidence: 99%
See 1 more Smart Citation
“…The communication over long distances between geographically separated assets is the key characteristic that differentiates monolithic HIL simulations from GD simulation. For feasibility purposes, communication generally takes place over the Internet with time delays depending on the available network infrastructure between the sites and in contrast with monolithic setups present non-deterministic time delays [78]. Latencies over the Internet between different cities have been evaluated in [69,72].…”
Section: Communicationsmentioning
confidence: 99%
“…DPSL comprises equipment representing both conventional and non-synchronous generation, static and dynamic loads, arranged in such a way as to be able to run as three independent islands (or cells, as in Figure 2a) or brought together in any combination as a single system. State-of-the-art HIL techniques such as seamless initialization and synchronization of large test setups [51], experimental setup time-delay characterization [52] and measurements delay identification [53] and compensation [54] enable the realization of a high fidelity systems-level testing facility able to robustly de-risk novel control solutions for emerging power systems.…”
Section: Test Rigmentioning
confidence: 99%