Double recessed T-gate Alo.2GaO.8As/InO25GaO75As pseudomorphic HEMTs with 0.3 pm gate length and different upper recess widths have been processed and analyzed. Systematic investigations concerning the correlation between drain ledge, breakdown voltage and power performance have been carried out. An optimum upper recess width has been identified which yields to a high drain-source breakdown voltage of about 24 V. A state of the art saturated output power density of 1080 mW/mm at 2 GHz is demonstrated under CW-mode of operation. DC and power measurements are performed on wafers which are not thinned.
INTRODUCTIONFor power applications, e.g. in mobile or satellite communication systems, FETs with high gain, high power added efficiency (PAE) and high output power density are required. To achieve a higher output power density it