Characterization of Poly‐Buffered LOCOS in Manufacturing Environment

Abstract

Poly‐buffered LOCOS (1–4) is an advanced, electrical isolation scheme developed as an alternative to conventional LOCOS (5–7) to minimize field oxide encroachment into active regions while maintaining satisfactory field thresholds with designs employing 1.0 μm active regions and 1.2 μm isolation spacings. Poly‐buffered LOCOS, or PBL, facilitates design rule shrinking and smaller cell size required for future technologies such as EPIC‐2 (1). This isolation scheme utilizes an oxide/poly/nitride sandwich to block field oxidation in active regions instead of the oxide/nitride sandwich used in standard LOCOS isolation. The presence of the intermediate poly layer allows the oxide to be thinned and nitride thickened without generating undue stress in active regions in order to reduce encroachment during field oxidation. Lateral encroachment is reduced to approximately 0.1 μm/side for PBL, compared to 0.5 μm/side for standard LOCOS. The effectiveness of this polysilicon cushion layer was proven by defect etching as well as by electrical measurements of gate oxide integrity (GOI) breakdown voltage and other critical device parameters such as diode leakage, transistor Vt and subthreshold slope, and parasitic field oxide threshold. Process details and electrical characterizations obtained during the implementation of poly‐buffered LOCOS are reported. Considerable process latitude exists in buffer layer thickness and dry or wet removal techniques, demonstrating the production tolerance of PBL.

Recessed polysilicon encapsulated local oxidation

“…Unfortunately, LOCOS has an inherently large field oxide encroachment (bird's beak) which precludes integration in advanced VLSI and ULSI technologies. Several modified-LOCOS isolations that reduce field oxide encroachment such as PBL have been proposed [ 11, [2]. Even though reduced encroachment is often realized, these techniques decrease the degree of field oxide recess, which reduces the effective electrical source-to-drain separation.…”