2006 IEEE Nanotechnology Materials and Devices Conference 2006
DOI: 10.1109/nmdc.2006.4388970
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Characterization of Pd-nanocrystal-based nonvolatile memory devices

Abstract: Charge loss rate of Pd-nanocrystal (NC)-based nonvolatile memories is reduced about 60% by employing an asymmetric tunnel barrier composed of stacked SiO 2 and HfO 2 layers or insulating ZrO 2 NCs between Pd NCs. Keywords-Pd nanocrystal; nonvoltile memory; asymmetric tunnel barrier; ZrO 2 nanocrystalI.

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