Characterization of Oxidation Induced Substrate Loss

Abstract

Post implant resist strip for 45 nm and below poses challenges with regard to Si substrate loss due to oxidation and surface modification. In particular, the process to form Ultra Shallow Junctions (USJ) with high-dose implant (HDI) creates a carbonized, cross-linked crust on the surface of the resist. Removal of the implanted resist typically requires temperature-controlled and chemically aggressive approaches which can lead to excessive substrate damage. In order to ensure the desired device characteristics, this damage must be kept to a minimum, and the required optimization is dependent on highly sensitive metrology techniques. This paper reports on wafer mass loss as a direct linear measurement technique to quantify substrate loss.

Plasma-Enhanced Atomic Layer Deposition Sealing Property on Extreme Low-k Film with k = 2.0 Quantified by Mass Metrology

“…In order to investigate pore-sealing SiN formation on porous SiOCH films and its diffusion into pores in the films, mass change due to pore-sealing film deposition was measured using a Metryx system. 30,31) The technique is a nondestructive, whole-wafer measurement, quantifying the total amount of deposition on the 300-mm wafer. To investigate the sealing capability of the pore-sealing film, wet chemical diffusion 32) into porous SiOCH films was measured.…”