Characterization of High-Pressure $\hbox{XeF}_{2}$ Vapor-Phase Silicon Etching for MEMS Processing

This paper describes the main protocols that are used for fabricating microfluidic devices from glass and silicon. Methods for micropatterning glass and silicon are surveyed, and their limitations are discussed. Bonding methods that can be used for joining these materials are summarized and key process parameters are indicated. The paper also outlines techniques for forming electrical connections between microfluidic devices and external circuits. A framework is proposed for the synthesis of a complete glass/silicon device fabrication flow. I. WHY USE SILICON AND GLASS IN MICRO-AND NANO-FLUIDIC APPLICATIONS?Micro-and nano-fluidic technology continues to be embraced by biologists, 1-3 chemists, 4 and engineers throughout academia and industry. As its applications have expanded, there has been an explosion in the range of materials and processes used to fabricate these devices. The earliest microfluidic devices (e.g., gas 5 and liquid 6 chromatography devices) were made from silicon and glass and borrowed processes directly from semiconductor and microelectromechanical systems (MEMS) manufacturing. 7 Now, however, many researchers have moved away from silicon and glass, and instead use cast elastomers such as polydimethylsiloxane (PDMS)-which is ideal for swift prototyping-or thermoplastic polymers, which can be hot-embossed or injection-molded and are well suited to inexpensive manufacturing. Yet, there remain many applications where glass and silicon offer advantages over polymeric materials. In this paper, we highlight these advantages and offer a framework for selecting fabrication processes when using silicon and glass. A. The dominance of soft lithographyOver the last decade, PDMS has become virtually the default material for forming microfluidic devices, 8 because of the sheer ease with which it can be cast on to a micro-scale mould and then strongly bonded to glass. 9 The elastomeric nature of the material has been exploited to integrate fluidic valves and pumps on-chip and has simplified the production of multi-layer devices because the soft layers readily conform to each other. 10,11 Yet, the low stiffness (usually <1 MPa) of PDMS relative to amorphous thermoplastics, silicon, and glass has its own a) Authors to whom correspondence should be addressed. Electronic addresses: ciliescu@ibn.a-star.edu.sg and hkt@ntu.edu.sg. 6, 016505 (2012) drawbacks. High aspect-ratio channels are notoriously difficult to fabricate in PDMS because of their propensity to collapse. 12 Moreover, difficulties in automating the handling of such a soft material have hampered efforts to scale up PDMS device manufacturing. Meanwhile, PDMS's high oxygen and water permeabilities have proved both a blessing and a curse in different applications.The hydrophobic nature of PDMS can be an important consideration for some biological applications. In drug screening applications, for example, hydrophobic drugs as well as metabolites (urea or albumin) can be absorbed into the device's material due to hydrophobic--hydrophobic interaction...

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“…A common isotropic dry etch uses XeF 2 as the precursor. 73 The process is mainly used for dry-release in surface micromachining.…”

Section: Dry Etchingmentioning

confidence: 99%

A practical guide for the fabrication of microfluidic devices using glass and silicon

Iliescu¹,

Taylor²,

Avram³

et al. 2012

Biomicrofluidics

302

207

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“…As a silicon etchant, XeF1 has unique advantages such as high selectivity for silicon, gas-phase isotropic etching and ease of operation [3]- [5].…”

Section: Introductionmentioning

confidence: 99%

Characterization of wafer-level XeF<inf>2</inf> Gas-phase Isotropic Etching For MEMS Processing

Xiong

et al. 2012

2012 7th IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS)

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This paper reports the characteristics of wafer level XeF2 gas-phase etching. Compared with chip-level XeFz etching, the silicon etch rate for wafer-level XeF 2 process is much smaller, which is mainly caused by the large exposed silicon area in wafer-level process. Additionally, the silicon etch rate drops off as etching time increased. The aperture size effect is apparent in wafer-level XeFz processing. However, for etching window with large size, the aperture size effect will be minimized. The vertical aperture size effect is direct proportion to the number of etch cycle, while the lateral aperture size effect is first increase then decrease with the number of etch cycle increasing. Slight anisotropy of wafer-level XeF 2 etching is also observed. Based on the characteristics of XeFz etching, layout design rule for MEMS device with XeF z releasing is developed and demonstrated.

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“…Some researchers have noted that roughness occurs because etching begins at etch sites which expand out to meet each other [12]. Faster etch rates and longer etch times make these non-uniformities become larger, and the surface becomes rougher [13].…”

Section: Introductionmentioning

confidence: 99%

The Effect of Temperature on the Etch Rate and Roughness of Surfaces Etched With XEF2

Butner

Leseman

2010

Volume 10: Micro and Nano Systems

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In this work we present results from a pulsed etching system with XeF 2 for an expanded temperature range while at the same time determining the roughness of the substrate left behind. The experimental apparatus used for the work presented in this paper is capable of temperature ranges from approximately 100 to 800 K. Data was taken at a constant etching pressure of 1.2 Torr so the effect of temperature on roughness and etch rate could be studied. Etch rates and surface roughnesses were characterized using a vertical scanning and phase shifting interferometer, respectively.

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Characterization of High-Pressure $\hbox{XeF}_{2}$ Vapor-Phase Silicon Etching for MEMS Processing

Cited by 24 publications

References 6 publications

A practical guide for the fabrication of microfluidic devices using glass and silicon

A practical guide for the fabrication of microfluidic devices using glass and silicon

Characterization of wafer-level XeF<inf>2</inf> Gas-phase Isotropic Etching For MEMS Processing

The Effect of Temperature on the Etch Rate and Roughness of Surfaces Etched With XEF2

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