Channel‐Constrained Electroless Metal Deposition on Ligating Self‐Assembled Film Surfaces

Abstract

The ability to fabricate spatially well-defined, patterned, metal films on various substrates is critically important for numerous microelectronics applications. For example, fabrication of metal contacts and conductors is required in microwave circuits, printed wiring board (PWB) circuitry, local and global chip interconnects, and other aspects of electronics packaging technology. 1 Metal patterns are routinely used to define the opaque regions of reticles and masks for optical and X-ray lithography. Thin metal films have also been used as protective layers for pattern transfer in integrated circuit (IC) lithography due to the extremely high etching resistance of metals and/or oxides derived from elements such as titanium, 2 tungsten, 3 zirconium, 4 and nickel. 5 Many processes exist for metal pattern fabrication. Metal deposition techniques include sputtering, evaporation, chemical vapor deposition, electrolytic deposition, and electroless (EL) deposition. Of these, EL deposition 6 is particularly attractive in manufacturing because it offers the ability to metallize nonplanar, insulating substrates with low-temperature processes using simple materials and equipment at low cost. Approaches for producing lithographic patterns of metals are of two general classes: subtractive and additive. The traditional lift-off method is an example of a subtractive process wherein metal is initially homogeneously deposited over an exposed and developed photoresist; the remaining resist must then be stripped to remove metal from the regions where it is not required. Additive metallization is a simpler and less wasteful approach having distinct advantages in ease of processing and cost. A typical example of this approach involves initial deposition of a thin, homogeneous metal layer (by any of the above-mentioned techniques) onto a substrate, followed by lithographic patterning of a resist to block selected regions of the underlying metal film. The exposed metal underlayer serves as either an electrode for electrolytic 7 up-plating or as a catalytic region for EL metal deposition. 8 However, even with these approaches, the initial thin metal layer can lead to significant problems in the ultimate device structures, and subtractive steps must again be used to remove the buried metal. We therefore sought to develop an alternative process utilizing photolithography and molecular self-assembly together to spatially control the binding of a Pd EL catalyst to a substrate and initiate EL metal deposition in a fully additive manner.We have previously shown that self-assembled (SA) films of organosilanes containing ligand functional groups such as phosphines, pyridines, or alkylamines are useful for binding Pd catalysts to surfaces and that the bound catalysts initiate EL deposition. 9-12 These films are formed by chemisorption of alkoxysilane or chlorosilane precursors (typically of formula R n SiX 4Ϫn , where R contains the ligating group, X ϭ Cl, OCH 3 , or OC 2 H 5 , and n ϭ 1-3) to hydroxyl groups on the surface of various substrates...

Reversible Soft Top‐Contacts to Yield Molecular Junctions with Precise and Reproducible Electrical Characteristics

“…Unlike other methods to fabricate SAM‐based devices (of the sort shown in Figure ), our technique is compatible with template‐stripped bottom‐electrodes and does not require patterning of the bottom‐electrode. This ensures that the electrodes supporting the SAMs are clean and never had been exposed to photoresist (which is often difficult to remove completely) and only briefly exposed to the ambient (few seconds), and do not contain edges at which SAMs cannot pack well . The stabilization of the top‐electrode minimizes the user‐to‐user variation in contacting the SAMs, defines the geometrical area of the junctions.…”

“…i) The bottom‐electrode needs to be patterned which normally requires lithography. Patterning by e‐beam‐ or photolithography often leaves resist residues on the electrode behind that are difficult to remove completely and consequently result in defective SAMs . ii) The bottom‐electrodes contain exposed edges at which SAMs cannot form densely packed layers .…”

<title>Fabrication of patterned-surface reactivity templates using physisorption of reactive species in solvent-imprinted nanocavities</title>

“…17 The cleaned substrates were coated with PTCS or CMPTS SAMs by immersion in a 0. 1 % w/v solution of the silane in toluene for 3 h at room temperature under dry N2 atmosphere (moisture level '-5-1O ppm) inside a glove box.…”

69.2: New R2PAT Printing Method for Fabricating TFT Electrodes

“…The substrate is coated with an amino-silane coupling agent, for example 3-(2-aminoethylamino) propyltrimethoxysilane. [8] The amino-silane adheres with the glass substrate by siloxane linkage and with Pd by coordinate covalent bonding of the amino group.…”