Challenges to combining general-purpose and multimedia processors

Conte, Thomas M.; Dubey, Pradeep; Jennings, Matthew; Lee, R.B.; Peleg, A.; Rathnam, S.; Schlansker, Michael; Song, Pyeong-Jung; Wolfe, Andrew

doi:10.1109/2.642799

Cited by 62 publications

(33 citation statements)

References 6 publications

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“…In most cases, multimedia data are packed into subwords of one or two bytes that are processed in parallel in word oriented processors as per the single instruction multiple data (SIMD) [5] [8]. This is called subword parallelism.…”

Section: Introductionmentioning

confidence: 99%

Hardware Implementation of Low Power Audio Sub word Sorter Unit for High SecurityTransmission

Karthigaikumar¹,

Baskaran²

2009

IJCEE

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Abstract-The security of audio data in high end communication applications like satellites and radars is an issue of concern these days. Designing a processor at the chip level for this requirement is by itself a challenge to VLSI engineers. This paper aims to design a HDL based novel audio subword sorter unit, which is less complex in structure and highly efficient in terms of security. In this paper, we examine the hardware implementation of powerful permutation instruction group (GRP) in low power. This is done at the integrated chip (IC-level) using Verilog HDL and can be implemented in FPGA. To our knowledge this is the first audio subword sorter unit implemented in FPGA

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Section: Introductionmentioning

confidence: 99%

Hardware Implementation of Low Power Audio Sub word Sorter Unit for High SecurityTransmission

Karthigaikumar¹,

Baskaran²

2009

IJCEE

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“…However, most SIMD media extensions have a limited memory architecture which provides access to only contiguous data in memory, with strong alignment restrictions and a weak support for partial load and stores [3], [4]. These architectures, either do not provide any hardware support for unaligned accesses or provide it but at the expense of a big performance penalty.…”

Section: Introductionmentioning

confidence: 99%

Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video Codec Applications

Álvarez¹,

Salamí²,

Ramírez

et al. 2007

2007 IEEE International Symposium on Performance Analysis of Systems &Amp; Software

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Abstract-Although SIMD extensions are a cost effective way to exploit the data level parallelism present in most media applications, we will show that they had have a very limited memory architecture with a weak support for unaligned memory accesses. In video codec, and other applications, the overhead for accessing unaligned positions without an efficient architecture support has a big performance penalty and in some cases makes vectorization counter-productive. In this paper we analyze the performance impact of extending the Altivec SIMD ISA with unaligned memory operations. Results show that for several kernels in the H.264/AVC media codec, unaligned access support provides a speedup up to 3.8X compared to the plain SIMD version, translating into an average of 1.2X in the entire application. In addition to providing a significant performance advantage, the use of unaligned memory instructions makes programming SIMD code much easier both for the manual developer and the autovectorizing compiler.

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“…Conte et al [2] highlight in particular how the use of different programming languages along with their respective (sometimes exotic) compilers and the inherent load balancing and management among heterogeneous environments are common problems needing to be addressed. The latter issue is part of a more general load-balancing problem, for which it is impossible to design a universal solution, as the tasks distribution is heavily dependent on the algorithm being distributed.…”

Section: Related Workmentioning

confidence: 99%

Low-level trace correlation on heterogeneous embedded systems

Bertauld

Dagenais

2017

J Embedded Systems

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Tracing is a common method used to debug, analyze, and monitor various systems. Even though standard tools and tracing methodologies exist for standard and distributed environments, it is not the case for heterogeneous embedded systems. This paper proposes to fill this gap and discusses how efficient tracing can be achieved without having common system tools, such as the Linux Trace Toolkit (LTTng), at hand on every core. We propose a generic solution to trace embedded heterogeneous systems and overcome the challenges brought by their peculiar architectures (little available memory, bare-metal CPUs, or exotic components for instance). The solution described in this paper focuses on a generic way of correlating traces among different kinds of processors through traces synchronization, to analyze the global state of the system as a whole. The proposed solution was first tested on the Adapteva Parallella board. It was then improved and thoroughly validated on TI's Keystone 2 System-on-Chip (SoC).

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Challenges to combining general-purpose and multimedia processors

Cited by 62 publications

References 6 publications

Hardware Implementation of Low Power Audio Sub word Sorter Unit for High SecurityTransmission

Hardware Implementation of Low Power Audio Sub word Sorter Unit for High SecurityTransmission

Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video Codec Applications

Low-level trace correlation on heterogeneous embedded systems

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