2020
DOI: 10.1109/access.2020.2985291
|View full text |Cite
|
Sign up to set email alerts
|

CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability

Abstract: NAND flash suffers from program interference and retention errors, which negatively affect its reliability. Existing schemes preprocess raw data before writing them to reduce Raw Bit Error Rate (RBER) and leverage ECCs (such as LDPC codes) to reduce Uncorrectable Bit Error Rate (UBER). Prior arts failed to take into account the counteractions between the program interference and retention errors.Thus, they may lead to sub-optimal error avoidance. Besides, after the preprocessing procedure, data randomness may … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2023
2023
2024
2024

Publication Types

Select...
1
1

Relationship

0
2

Authors

Journals

citations
Cited by 2 publications
(1 citation statement)
references
References 27 publications
0
1
0
Order By: Relevance
“…However, it is not accurate enough to calculate each VSER according to the fixed proportion of RBER. Based on the research [10], HONGWEI QIN et al innovatively modify LLR values [20] based on the modulatory ๐‘‰ ๐‘‡ ๐ป distribution, which improves the error-correcting ability and accelerates the decoding process.…”
Section: Introductionmentioning
confidence: 99%
“…However, it is not accurate enough to calculate each VSER according to the fixed proportion of RBER. Based on the research [10], HONGWEI QIN et al innovatively modify LLR values [20] based on the modulatory ๐‘‰ ๐‘‡ ๐ป distribution, which improves the error-correcting ability and accelerates the decoding process.…”
Section: Introductionmentioning
confidence: 99%