Cere

Abstract

Computing Research CHADI AKEL, Exascale Computing Research ERIC PETIT and MIHAIL POPOV, Université de Versailles Saint-Quentin-en-Yvelines WILLIAM JALBY, Exascale Computing Research This article presents Codelet Extractor and REplayer (CERE), an open-source framework for code isolation. CERE finds and extracts the hotspots of an application as isolated fragments of code, called codelets. Codelets can be modified, compiled, run, and measured independently from the original application. Code isolation reduces benchmarking cost and allows piecewise optimization of an application. Unlike previous approaches, CERE isolates codes at the compiler Intermediate Representation (IR) level. Therefore CERE is language agnostic and supports many input languages such as C, C++, Fortran, and D. CERE automatically detects codelets invocations that have the same performance behavior. Then, it selects a reduced set of representative codelets and invocations, much faster to replay, which still captures accurately the original application. In addition, CERE supports recompiling and retargeting the extracted codelets. Therefore, CERE can be used for cross-architecture performance prediction or piecewise code optimization. On the SPEC 2006 FP benchmarks, CERE codelets cover 90.9% and accurately replay 66.3% of the execution time. We use CERE codelets in a realistic study to evaluate three different architectures on the NAS benchmarks. CERE accurately estimates each architecture performance and is 7.3× to 46.6× cheaper than running the full benchmark.

Efficient thread/page/parallelism autotuning for NUMA systems

“…We use the Codelet Extractor and REplayer (CERE [7]) framework to capture and replay codelets. CERE uses Ptrace [27] to capture the memory by spawning a process which controls and monitors the application execution.…”

“…Hardware Performance Monitoring Units (PMU) can be used during application execution [6,21,32] to sample a limited number of events, such as long-latency or DTLB misses. The virtual memory system can be used to lock pages to detect access to them on faults and record the thread and address accessed [7,14,19,21]. This approach does not require sampling, and can collect more detailed information for first/next-touch policies [14,19] but the overhead of locking/unlocking and trapping is greater than querying the PMU.…”

“…This warmup is accurate when all calls touch similar data (true for most benchmarks), but may slow down the exploration and cause the codelet to miss-predict the execution time if the first call is more costly than the others (Needle). To address this issue, we can sample more calls or improve CERE warmup by keeping a trace of the recently accessed pages just before the parallel region for each thread [7].…”

An Efficient Application Specific Memory Storage and ASIP Behavior Optimization in Embedded System

“…Embedded processors for which LANCE based C compilers have been successfully built include both RISCs and DSPs design. The implementation of edge profiling, path profiling methods combines profiles with in the Low Level Virtual Machine [16] compiler infrastructure [ Fig. 25].…”

Dynamic Precision Autotuning with TAFFO

“…Dynamic mixed precision tuning is a recurring task, which is invoked multiple times while the application is running. In this case, the precision tuning is considered as a possible code transformation to perform continuous program optimization [3,19], which suggests to dynamically adapt the application to the system runtime conditions and to the state of the execution. Thus, the reconfiguration overhead must be minimized.…”