Cell/B.E. blades: Building blocks for scalable, real-time, interactive, and digital media servers

Nanda, Ashwini K.; Moulic, J.R.; Hanson, Robert; Goldrian, G.; Day, M. N.; D'Arnora, B. D.; Kesavarapu, S.

doi:10.1147/rd.515.0573

Cited by 24 publications

(17 citation statements)

References 5 publications

(8 reference statements)

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“…To evaluate our initial implementation of Huckleberry we use the QS20 Cell Blade [8] because of its flexibility and computational power and because it is representative of the class of distributed-memory multi-core platforms. Each QS20 features two Cell BE processors together with 1GB of XDRAM.…”

Section: Methodsmentioning

confidence: 99%

“…Decentralization is a central idea to our approach, and is achieved by allowing cores to calculate for themselves which tasks they are responsible for, and when and with whom they should swap data. Our experiments show that Huckleberry is able to automatically generate a parallel implementation from sequential functions for several benchmarks for a complex multi-core platform such as the QS20 Cell Blade [8], which comprises 18 heterogeneous distributed memory cores over two Cell BE chips. By keeping as much communication local to each chip as possible, Huckleberry takes advantage of the performance edge delivered by high-speed on-chip networks.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Recursion-driven parallel code generation for multi-core platforms

Collins

Vellore

Carloni

2010

2010 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE 2010)

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Abstract-We present Huckleberry, a tool for automatically generating parallel implementations for multi-core platforms from sequential recursive divide-and-conquer programs. The recursive programming model is a good match for parallel systems because it highlights the temporal and spatial locality of data use. Recursive algorithms are used by Huckleberry's code generator not only to automatically divide a problem up into smaller tasks, but also to derive lower-level parts of the implementation, such as data distribution and inter-core synchronization mechanisms. We apply Huckleberry to a multicore platform based on the Cell BE processor and show how it generates parallel code for a variety of sequential benchmarks.

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Section: Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Recursion-driven parallel code generation for multi-core platforms

Collins

Vellore

Carloni

2010

2010 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE 2010)

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“…A blade with Cell processors [37] including multi-Gigabyte DRAM and high-speed network connectivity would fall into this category. Smallscale academic settings may also adopt such a configuration, using, e.g., PS3 nodes and scaling down the workload per PS3 so as to not exceed the limited DRAM capacity and not stress the limited general-purpose processing capabilities of the PS3.…”

Section: Alternate Resource Configurationsmentioning

confidence: 99%

Designing Accelerator-Based Distributed Systems for High Performance

Rafique

Butt

Nikolopoulos

2010

2010 10th IEEE/ACM International Conference on Cluster, Cloud and Grid Computing

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Abstract-Multi-core processors with accelerators are becoming commodity components for high-performance computing at scale. While accelerator-based processors have been studied in some detail, the design and management of clusters based on these processors have not received the same focus. In this paper, we present an exploration of four design and resource management alternatives, which can be used on largescale asymmetric clusters with accelerators. Moreover, we adapt the popular MapReduce programming model to our proposed configurations. We enhance MapReduce with new dynamic data streaming and workload scheduling capabilities, which enable application writers to use asymmetric acceleratorbased clusters without being concerned with the capabilities of individual components. We present an evaluation of the presented designs in a physical setting and show that our designs can provide significant performance advantages. Compared to a standard static MapReduce design, we achieve 62.5%, 73.1%, and 82.2% performance improvement using accelerators with limited general-purpose resources, well-provisioned shared general-purpose resources, and well-provisioned dedicated general-purpose resources, respectively.

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“…[1,4,10,17] that provide ideas for the coordination of the heterogeneous cores and management of the separate memories. In this investigation, we considered three major issues that affect the choice of programming model.…”

Section: Sweep3d Programming Models For the Cell/bementioning

confidence: 99%

Implementation and Performance Modeling of Deterministic Particle Transport (Sweep3D) on the IBM Cell/B.E.

Lubeck

Lang

Srinivasan

et al. 2009

Scientific Programming

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Abstract. The IBM Cell Broadband Engine (BE) is a novel multi-core chip with the potential for the demanding floating point performance that is required for high-fidelity scientific simulations. However, data movement within the chip can be a major challenge to realizing the benefits of the peak floating point rates. In this paper, we present the results of implementing Sweep3D on the Cell/B.E. using an intra-chip message passing model that minimizes data movement. We compare the advantages/disadvantages of this programming model with a previous implementation using a master-worker threading strategy. We apply a previously validated micro-architecture performance model for the application executing on the Cell/B.E. (based on our previous work in Monte Carlo performance models), that predicts overall CPI (cycles per instruction), and gives a detailed breakdown of processor stalls. Finally, we use the micro-architecture model to assess the performance of future design parameters for the Cell/B.E. micro-architecture. The methodologies and results have broader implications that extend to multi-core architectures.

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Cell/B.E. blades: Building blocks for scalable, real-time, interactive, and digital media servers

Cited by 24 publications

References 5 publications

Recursion-driven parallel code generation for multi-core platforms

Recursion-driven parallel code generation for multi-core platforms

Designing Accelerator-Based Distributed Systems for High Performance

Implementation and Performance Modeling of Deterministic Particle Transport (Sweep3D) on the IBM Cell/B.E.

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