Case studies of defect localization based on software-based fault diagnosis in comparison with PEMS/OBIRCH analysis

Naoe, Takuya; Mizobe, Taketoshi; Yokoyama, Kohichi

doi:10.1016/j.microrel.2014.03.002

Cited by 4 publications

(5 citation statements)

References 6 publications

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“…The abnormal current variation at the abnormal spot is about 2.5 µA, while the current variation at the normal spot is about 0.5 µA (Figure 5c). This result is in accordance with the result tested by Emission Microscopy (EMMI) ( Figure 6), which is another common defect localization technology [18]. Figure 7 shows a possible physical reason for the failure, that is a cavity in the copper, found by the Focused Ion Beam (FIB) facility.…”

Section: Failure Localizationsupporting

confidence: 88%

“…As the laser beam scans the defect location, the abnormal ∆I will be tested, and a red spot will be marked on the layout diagram. The test results supplied by the voltage source or current source have similar properties according to Equations (16) and (18), so a voltage source is used for the test.…”

Section: Testing Systemmentioning

confidence: 99%

“…oltage variation should be ∆ = TLS − 0 = [ 0 ( + ∆ ) − ∆ ] − 0 (17) ∆ = −∆ + 0 ∆(18) contributions of the two effects are still opposite.es, a critical current bias c exists causing ∆ ≈ 0 the laser beam irradiates. When 0 > c , ∆ < 0 and technique is the main With regard to active device, which exists plenty of PN ions, has a more complex current variation.…”

mentioning

confidence: 99%

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Preliminary Study on the Model of Thermal Laser Stimulation for Defect Localization in Integrated Circuits

et al. 2020

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Thermal Laser Stimulation (TLS) is an efficient technology for integrated circuit defect localization in Failure Analysis (FA) laboratories. It contains Optical Beam-Induced Resistance Change (OBIRCH), Thermally-Induced Voltage Alteration (TIVA), and Seebeck Effect Imaging (SEI). These techniques respectively use the principle of laser-induced resistance change and the Seebeck effect. In this paper, a comprehensive model of TLS technology is proposed. Firstly, the model presents an analytical expression of the temperature variation in Integrated Circuits (IC) after laser irradiation, which quantificationally shows the positive correlation with laser power and the negative correlation with scanning velocity. Secondly, the model describes the opposite influence of laser-induced resistance change and the Seebeck effect in the device. Finally, the relationship between the current variation measured in the experiment and other parameters, especially the voltage bias, is well explained by the model. The comprehensive model provides theoretical guidance for the efficient and accurate defect localization of TLS technology.

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Section: Failure Localizationsupporting

confidence: 88%

Section: Testing Systemmentioning

confidence: 99%

mentioning

confidence: 99%

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Preliminary Study on the Model of Thermal Laser Stimulation for Defect Localization in Integrated Circuits

et al. 2020

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“…After comparing the measured data of good and failure samples, we can know that the abnormal part of the chip may be the digital module (red box on the left in Figure 8a) and the eFuse module (red box on the right in Figure 8a) of the chip. After testing with the location system, we also tested the good and failure samples using the PHEMOS-1000 system [29], setting the system using a 5× objective with a 15 s exposure time. Figure 9 shows the hot spot distribution obtained by the InGaAs camera for a good sample.…”

Section: Defect Locationmentioning

confidence: 99%

“…It can be verified that the defect localization system we proposed has good static defect localization ability. After testing with the location system, we also tested the good and failure samples using the PHEMOS-1000 system [29], setting the system using a 5× objective with a 15 s exposure time. Figure 9 shows the hot spot distribution obtained by the InGaAs camera for a good sample.…”

Section: Defect Locationmentioning

confidence: 99%

Preliminary Study on Automatic Detection of Hard Defects in Integrated Circuits Based on Thermal Laser Stimulation

Cai

et al. 2023

Photonics

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Locating the fault position is a crucial part of the failure mechanism analysis of integrated circuits. This paper proposes a hard defect locating system based on Thermal Laser Stimulation (TLS) technology. The equation for laser-induced changes in the electrical parameters of semiconductor devices is a good guide to the hardware and software design of the hard defect locating system. The scanning mode of fast total scanning combined with slow point-to-point scanning can quickly locate abnormal areas. A modified median absolute difference (MAD) method is applied to the extraction of anomalous data. The system software can automatically and collaboratively control the 3D mobile station, laser, and signal acquisition unit. It also can intuitively display the distribution of abnormal points on the infrared image. Using a failure MRAM chip and a good one to conduct a comparative test, the abnormal points distributed on the infrared image of the chip indicate that the failure area is in the digital module or eFuse module of the chip, and the Emission Microscopy (EMMI) experiment also verifies the accuracy of the test system.

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Metal defect localization of GaAs or Si based ICs by dynamic emission microscopy

Chen

Liu

2017

Microelectronics Reliability

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Case studies of defect localization based on software-based fault diagnosis in comparison with PEMS/OBIRCH analysis

Cited by 4 publications

References 6 publications

Preliminary Study on the Model of Thermal Laser Stimulation for Defect Localization in Integrated Circuits

Preliminary Study on the Model of Thermal Laser Stimulation for Defect Localization in Integrated Circuits

Preliminary Study on Automatic Detection of Hard Defects in Integrated Circuits Based on Thermal Laser Stimulation

Metal defect localization of GaAs or Si based ICs by dynamic emission microscopy

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