Cascade: hardware for high/variable precision arithmetic

Carter, T.M.

doi:10.1109/arith.1989.72825

Cited by 21 publications

(9 citation statements)

References 6 publications

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“…Previous designs, such as [6] and [7] improve the speed of variable-precision computations, but do not provide direct hardware support for interval arithmetic. This paper presents a software interface and hardware design which support variableprecision, interval arithmetic.…”

Section: Introductionmentioning

confidence: 98%

A software interface and hardware design for variable-precision interval arithmetic

Schulte

Swartzlander

1995

Reliable Comput

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This paper presents a software interface and hardware design for variable-precision, interval arithmetic. The software interface gives the programmer the ability to spedfy the predsion of the computation and determine the accuracy of the result Special instructions for vector and matrix operations are also provided. The hardware design directly supports variable-precision, interval arithmetic. This gready improves the accuracy of the computation and is much faster than existing software methods for controlling numerical error. Hardware algorithms are presented for the basic arithmetic operations, exact dot products, and elementary functions. Area and delay estimates indicate that the processor can be implemented on a single chip With a cycle time that is comparable to existing IEEE d0uble-predsion floating point processors. 1-IporpaMMHl IntroductionAdvances in VLSI technology and computer architecture have lead to increasingly faster digital computers. During each of the last three decades, the computational speeds of the fastest computers increased by a factor of roughly 100 [1]. This increase in computing power has lead to the development of computer systems which perform billions of arithmetic operations per second and has given researchers the ability to solve previously intractable problems. The large number of arithmetic operations, however, has made it extremely important to keep track of and control errors in numerical computations.

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Section: Introductionmentioning

confidence: 98%

A software interface and hardware design for variable-precision interval arithmetic

Schulte

Swartzlander

1995

Reliable Comput

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“…To improve the accuracy and performance of vector and matrix operations, processors that support exact dot products have been designed [2,13,19]. Other processors, including CADAC [11], DRAFT [10], and Cascade [8], have been designed m provide hardware support for variable-precision arithmetic. Other processors, including CADAC [11], DRAFT [10], and Cascade [8], have been designed m provide hardware support for variable-precision arithmetic.…”

Section: Introductionmentioning

confidence: 99%

Variable-precision, interval arithmetic coprocessors

Schulte

Swartzlander

1996

Reliable Comput

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This paper presents hardware d~igns, arithmetic algorithms, and numerical applicmions for variableprecision, interv:il arithmetk coproces.~rs. These copr~mes.,~ms give the programmer the ability to ~ the initial precision of the comptttation, determine the accuracy of the results, and recomput¢ inaccttrate r~ults with higher precision. Variable-precision, interval arithmetic algorithms are used to reduce the execution times of numeric,'al applications. Three hardware designs with data "paths of 16, 3, 9, and 64 bits are examined. These designs are compared based tm their estimated chip area, cycle time, and executi~m times for various numerical appliGltinns. ~lch copl'~es.~r call be inlp[elnentorl on a single chip with a cycle time th:~t is comparable to IEEE double-precision floating point coprocessors. For certain numerical appficatkms, the copr~:es.,~rs ;ire two to |i~tlr orders of magnitude faster than *1 collventiotla] .,~)ftwar¢ package fi~r variable-precision, interval arithmetic. JAHTepBaAt I-IIIe apt@MeTtl iecKI/ie conpoIIeccopbI riepeMeHHOfi pa3p AHOCT M. FI. I~YAbTE t E. E. I~APLIAAI-L&EP, MA. rlpe;lcTaBaem,t gOHcTpygRtta almapaTyphL tlCIIO:lb3yeMble apttqbxterHqecgtte a:wopt~rMbt }t HpttJm~Ke-HtlH K pelueHlllo ql|CJIeHHNIX 3~t;'laq JlflH ltHTepl~l'IbHblX aptil~bMeTllqeCKttX Ct~|Ip~lleC.CoIX~B ltepeMeHHof! pa3pmmtw:rtt, [')vn cotlpoileccopm IIt)3Bt).'IHR)T IIpol'paMMItCTy yCT;IHaBdlIIIGITb t~atta.'~f, Hys~ pa3pHltHocrb Bt~Iq|I(Z'IeHIII~f, ()llp~/tCdlHTb TOqHOCTb pe3ydlbT~rroB tt 31tHOIR) Bl~'4ItG1~rrb FleToqHbl~ pe'3y,'Ib~tTbI C ~)dlb|l|~(! pa3p/.121ttOCTl,lo. ;~'l~I yMeHblIIeHtlH BpeMeHH BIMIIOJIHCHIIH B qllC'leHHhtX IlplL'lo)KeHtt.qX llCll{Plb3ylo'rC/-I IIHTepBIIdlbHO-aptICI~MeTItqecKHe ;I)IFOp~ITM,-I llepeMeHHOt~ pa3p~aHOCTIt. PaCCMOTpeHbt TpJI allll;lpaTHl, le CXeMI,I C tllllm)~t naHHlaX IttttpttHO~ 16, 3 9 I4 64 6ItTa. 2-)Tit CxeMla cpaBHHBag~TC~I llo wpe6yeMofi Itaolita.3.tl Kp}tcra.'Idla, ltp~/tOdlt~HTe.'IbUOCTtI pafxmero IIHK,|;I lt! i~MCTpOJ|elTICTB||R) B pa3altqHMx qtic'leH-HblX IIp|I:tOIKeHIII4X. Ka.q3KMf! IE~ ~TIIX C(}IIpOIIeccoI~t~B Mt}gKeT 6MTb |)e;Lqlti3oB~lH Wd OjtHt)M gptiCT~l$1.'lt~ C pa&~qefl H,'tCTOTOlTI, CpRBH~IMOft C COIIpoIleCcopaMH Hdlill~ll¢)IIIel4 TOt~KH "tBOfIHO~ TOtlH(~Ttl craHaap'ra IEEE. B HegoTOpblX qltC.'IeHHbIX ]IpHJIOTK¢~HH.o2X HalllI! COilpOt[eccopM Ha 2[B~t-qeTMpe IlOp.'4/lga 6McTpee, qeM pacrtt~c'rpaf~eHnbm IlpOl'paMMHbl¢ ItaKeThI, pe~l'lIl3yl(Hlllie ;lHTepBaJlbHy~ aptl010Me'rttKy llepeMeHHo/'t pa3p~anoc'rtt.

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“…The error estimation in [12] is based on Vignes's method [13], but the observations concerning dynamic precision extension maintain their validity even if a different error estimation method, like ours, is used. Researches on hardware implementations for variable precision arithmetic have been reported already many years ago [21], [22], as well as in recent times [35].…”

Section: State Of the Art 2 And Introductionmentioning

confidence: 99%

Floating-point numbers with error estimates

Masotti

1993

Computer-Aided Design

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Cascade: hardware for high/variable precision arithmetic

Cited by 21 publications

References 6 publications

A software interface and hardware design for variable-precision interval arithmetic

A software interface and hardware design for variable-precision interval arithmetic

Variable-precision, interval arithmetic coprocessors

Floating-point numbers with error estimates

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