Cartesian genetic programming as local optimizer of logic networks

Abstract

Logic synthesis and optimization methods work either globally on the whole logic network or locally on preselected subnetworks. Evolutionary design methods have already been applied to evolve and optimize logic circuits at the global level. In this paper, we propose a new method based on Cartesian genetic programming (CGP) as a local area optimizer in combinational logic networks. First, a subcircuit is extracted from a complex circuit, then the subcircuit is optimized by CGP and finally the optimized subcircuit replaces the original one. The procedure is repeated until a termination criterion is satisfied. We present a performance comparison of local and global evolutionary optimization methods with a conventional approach based on ABC and analyze these methods using differently pre-optimized benchmark circuits. If a sufficient time is available, the proposed locally optimizing CGP gives better results than other locally operating methods reported in the literature; however, its performance is significantly worse than the evolutionary global optimization.

Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP

“…CGP for Synthesizing Complex Functions. CGP is a type of genetic programing that is specifically used for designing combinational digital circuits [23,38,39]. It creates directed acyclic graphs that function as combinational arrays of gates, which represent the digital circuits.…”

“…Despite being straightforward and scalable, this synthesis method is unable to represent XOR and XNOR gates with less than three AIG nodes each. As a result, the current synthesis method is considered insufficiently robust to represent real-world designs that are typically nonlinear in nature [18,23]. The disjunctive normal form method is another alternative approach for synthesizing and realizing digital circuits incorporating all possible input combinations to achieve the required output.…”