Cardiac abnormality prediction using HMLP network

Adnan, J.; Ahmad, Khairol Amali Bin; Mat, None Muhamad Hadzren; Rizman, Zairi Ismael; Ahmad, S.

doi:10.1063/1.5022899

Cited by 1 publication

(2 citation statements)

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“…The additional weighted connections of HMLP effectively form a linear model in parallel to the non-linear MLP [3]. The HMLP had been applied for different applications, such as heart anomaly detection using electrocardiogram (ECG) data [4], classification of acute leukemia disease [5] and forecasting of car speed [6]. The HMLP had also been implemented on hardware, the most recent hardware implementation of HMLP was on a Rabbit Core Module RCM4100 microcontroller [7].…”

Section: Introductionmentioning

confidence: 99%

“…Literature review that has been done author used in the chapter "Introduction" to explain the difference of the manuscript with other papers, that it is innovative, it are used in the chapter "Research Method" to describe the step of research and used in the chapter "Results and Discussion" to support the analysis of the results [2]. If the manuscript was written really have high originality, which proposed a new method or algorithm, the additional chapter after the "Introduction" chapter and before the "Research Method" chapter can be added to explain briefly the theory and/or the proposed method/algorithm [4]. Figure 1 illustrates the structure of the HMLP [3].…”

Section: Introductionmentioning

confidence: 99%

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FPGA-based architecture of hybrid multilayered perceptron neural network

Ann

Ehkan

Mashor

et al. 2019

IJEECS

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<span lang="EN-MY">The HMLP is an ANN similar to the MLP, but with extra weighted connections that connect the input nodes directly to the output nodes. The architecture of the HMLP neural network for implementation on FPGA is proposed. The HMLP architecture is designed to be concurrent to demonstrate the parallel nature of the HMLP where each hidden or output node within the same hidden or output layer of the HMLP can calculate its output independently. The HMLP architecture is designed to be modular as well, such that if modification to a module is necessary, only the specific module need to be modified and all other modules can be retained. This modularity will be especially helpful when different activation function is to be swapped in to replace current activation function. All calculations in the HMLP are performed in floating-point arithmetic. The HMLP architecture is compiled, simulated and finally implemented on the Cyclone V FPGA of DE1-SoC board. The simulation outcome and FPGA outputs showed that the developed HMLP architecture is able to calculate correct output values for all test datasets.</span>

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