Capacitance of a circular symmetric model of a via hole including finite ground plane thickness

Kok, P.; Zutter, D. De

doi:10.1109/22.85393

Cited by 70 publications

(18 citation statements)

References 7 publications

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“…Let the partial charge on the conducting plane from D b to L be Q.D 2Q I C Q II / where Figure 6 illustrates Q as a function of the upper limit L for different b=a when a D 200 m (typical via radius). Note that Q is approximately linearly proportional to L for large values of L, and the charge per unit length remains almost constant for these values of L. Figure 6 shows that Q (D Qj Db2 Qj Db1 , b 1 , and b 2 : aperture outer radii) increases with an increasing b (D b 2 b 1 ) and is independent of L. Table 1 compares the capacitance changes (C D Q=V 0 ) between the proposed theory and Kok and Zutter (1991). Good agreement is noted for small aperture openings but some disagreement with an increasing aperture size.…”

Section: Computationsmentioning

confidence: 87%

“…The Weber transform, the modematching method, and the superposition principle will be used to solve this problem, as was done in Lee and Eom (2010). Note that previous works (Wang et al, 1988;Kok & Zutter, 1991;Lee & Dudley, 1990) were based on the integral equation and the method of moments. Unlike the method of moments, the proposed approach uses eigenfunction expansions, which guarantee a simple convergent series solution.…”

Section: Introductionmentioning

confidence: 99%

“…The geometry of a long conducting cylinder penetrating a circular aperture in a conducting plane finds practical applications for via structures (Wang et al, 1988;Kok & Zutter, 1991). Electromagnetic wave transmission along a long cylinder penetrating a circular aperture in a conducting plane was considered in Lee and Dudley (1990).…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Static Field by an Infinitely Long Cylinder Penetrating a Circular Aperture

Lee

Eom

2012

Electromagnetics

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An electrostatic problem of a long conducting cylinder penetrating a circular aperture on a conducting plane is solved in this study. The Weber transform and mode matching are utilized to determine the electrostatic potential. The boundary conditions are enforced to obtain series equations for the discrete modal coefficients. Computations are carried out to illustrate the static fields, surface charge densities, and capacitance changes for various geometries.

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Section: Computationsmentioning

confidence: 87%

Section: Introductionmentioning

confidence: 99%

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Static Field by an Infinitely Long Cylinder Penetrating a Circular Aperture

Lee

Eom

2012

Electromagnetics

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“…The terms C a and ε eff are defined as shown in (11) and (12). In (11) and (13), w, t, h and w e represent width, thickness of the conductor, substrate thickness, and effective width that accounts for the extra capacitance caused by the finite thickness of the signal conductor, respectively.…”

Section: Impedance Matching At Interconnect-via Junctionmentioning

confidence: 99%

“…The capacitance of the via is extracted either from the solution of integro-differential equations [12] or from full-wave simulations [18]. Multiple via interconnect structures have been analyzed by decomposing the geometry into exterior and interior structures [8].…”

Section: Introductionmentioning

confidence: 99%

Minimization of Via-Induced Signal Reflection in On-Chip High Speed Interconnect Lines

Krishna¹,

Bhat

2011

Circuits Syst Signal Process

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Vias are extensively used to connect different metal levels in a multilayered Integrated Circuits (IC). The impedance discontinuities at the junction of the interconnect and via results in signal reflections and create signal integrity problems. This is one of the important design issues in ICs operating at gigahertz (GHz) frequencies. In this paper, a method for the reduction of via-induced signal reflection in high-speed on-chip intermediate/global interconnect structures is proposed. Signal reflection minimization is achieved through impedance matching by the inclusion of an appropriate capacitive load at the interconnect-via junction. This method is demonstrated for a two-layer interconnect structure connected through a via. The proposed solution reduces the signal reflection to as low as −35 dB at the tuned frequency of 5 GHz and less than −10 dB in its vicinity (1 to 10 GHz). The operating frequency can be changed by tuning the matching capacitive load and hence this method can be extended to any high frequency operation by digitally tuning a bank of on-chip capacitors (without going through a new fabrication run). Further it is shown that the signal reflections are reduced considerably in a six-layer structure and hence this method can be extended to any multi-level interconnect structure.

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Estimates for the partial capacitance of a printed circuit board via

Stén

Dufva

1999

Microw. Opt. Technol. Lett.

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A printed circuit board via is analyzed as a collection of sections bounded by grounded planes. A semianalytical expression for the capacitance of such a section is deduced and numerically adapted to solutions obtained with the finite‐element method. For high permittivities, one may also estimate the capacitance of a via terminating at a dielectric interface. ©1999 John Wiley & Sons, Inc. Microwave Opt Technol Lett 20: 160–163, 1999.

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Capacitance of a circular symmetric model of a via hole including finite ground plane thickness

Cited by 70 publications

References 7 publications

Static Field by an Infinitely Long Cylinder Penetrating a Circular Aperture

Static Field by an Infinitely Long Cylinder Penetrating a Circular Aperture

Minimization of Via-Induced Signal Reflection in On-Chip High Speed Interconnect Lines

Estimates for the partial capacitance of a printed circuit board via

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