Can NROM, a 2 Bit, Trapping Storage NVM Cell, Give a Real Challenge to Floating Gate Cells?

Investigation of Drain Disturb in SONOS Flash EEPROMs

“…Among the various alternative nonvolatile memories that are being explored, silicon-oxide-nitride-oxide-silicon (SONOS)-type (e.g., NROM) nitride-based charge-trapping memories come closest to replacing FG EEPROMs in the future generations [1]- [4]. In addition to being more scalable than FG EEPROMs, they require fewer masking steps to integrate with core logic, thereby making them attractive for embedded applications as well [2], [3]. When operated using localized charge injection mechanisms (NOR applications) for program and erase, they provide low-voltage operation and also offer multibit-per-cell storage capability through spatial separation of trapped charges [2]- [4].…”

Dual-Bit/Cell SONOS Flash EEPROMs: Impact of Channel Engineering on Programming Speed and Bit Coupling Effect

“…Localized injection of electrons and holes is done by channel hot electron injection (CHEI) and band-to-band tunneling induced hot hole injection (HHI), respectively [3], [5]. The presence or absence of these localized electrons must be correctly sensed during the read step for proper threshold voltage (V T ) determination of both the bits and, therefore, the memory state.…”

“…The presence or absence of these localized electrons must be correctly sensed during the read step for proper threshold voltage (V T ) determination of both the bits and, therefore, the memory state. This is done using the reverse read method [5], [9], where read voltage (V D ) is applied to the opposite node (S or D but referred to as V D ) to sense any particular bit. During reverse read, read V D applied at the opposite node creates depletion layer, which screens any electrons stored at that node and prevents bit coupling (unintentional increase in V T for a particular node due to charges stored at the opposite node) [10]- [12].…”

“…Among various alternatives, nitride-trap storage-based siliconoxide-nitride-oxide-silicon (SONOS) flash memory appears to be technologically mature and promising to replace the FG flash [3]- [7]. Due to discrete (nonconducting) nature of the storage node, 2-bit/cell operation has been achieved in SONOS cells by localized injection of electrons (program) and holes (erase) near the drain (D) and source (S) junctions [3], [5]. Recently, a 4-bit/cell operation has been achieved in silicon-on-insulator (SOI)-based SONOS cells by storing charges on both the top and bottom ONO layers [8].…”

“…1 Both bit-1 and bit-2 programming transients were measured by the reverse-read method [5], [9] using read V D = 1.6 V. Programming time is defined as the time needed to reach a V T shift of 1.6 V (from natural V T ). Process and device simulations were done using ISE-TCAD tools DIOS and DESSIS [13].…”