C-Pack: A High-Performance Microprocessor Cache Compression Algorithm

Chen, Xi; Yang, Lei; Dick, Robert P.; Shang, Li; Lekatsas, H.

doi:10.1109/tvlsi.2009.2020989

Cited by 113 publications

(136 citation statements)

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“…Our analysis shows that although off-chip bandwidth compression achieves a significant compression ratio (e.g., more than 47% average effective bandwidth increase with C-Pack [7] across 54 mobile GPU applications), it also greatly increases the bit toggle count (e.g., 2.2× average corresponding increase). This effect, in turn, can significantly increase the energy dissipated in the on-chip/off-chip interconnects, which constitute a significant portion of the memory subsystem energy.1…”

Section: Why Data Compression Can Be Energy-inefficientmentioning

confidence: 91%

“…In this model, Energy is directly proportional to the bit toggle count, and Delay is inversely proportional to the compression ratio. Our second technique, Metadata Consolidation (MC), reduces the negative effects of scattering of metadata in a compressed cache line, which happens with many existing compression algorithms [2], [7], by consolidating compression-related metadata in a contiguous fashion.…”

Section: Our Approach: Toggle-aware Compressionmentioning

confidence: 99%

“…In this work, we examine the use of six compression algorithms for bandwidth compression in GPU applications, taking into account bit toggles: (i) FPC (Frequent Pattern Compression) [2]; (ii) BDI (BaseDelta-Immediate Compression) [18]; (iii) BDI+FPC (combined FPC and BDI) [17]; (iv) LZSS (Lempel-Ziv compression) [29], [1]; (v) Fibonacci (a graphics-specific compression algorithm) [19]; and (vi) C-Pack [7]. To ensure our conclusions are more practically applicable, we analyze real GPU applications with actual data sets provided by a major GPU vendor.…”

Section: Motivation Problem and Analysismentioning

confidence: 99%

“…Ideally, system architects would like to improve one or more of these system parameters, e.g., on-chip/off-chip bandwidth consumption, while simultaneously avoiding negative effects on other key parameters, such as overall system cost, energy, and latency characteristics. One potential way of addressing multiple of the described constraints is to employ dedicated hardware-based data compression mechanisms (e.g., [27], [2], [7], [18], [4]) across various data links in the system. Compression exploits the high data redundancy observed in many modern applications [18], [20], [4], [26].…”

Section: Introductionmentioning

confidence: 99%

“…Compression exploits the high data redundancy observed in many modern applications [18], [20], [4], [26]. It can be used to improve both capacity (e.g., of caches, DRAM, non-volatile memories [27], [2], [7], [18], [4], [17], [22], [16], [26]) and bandwidth utilization (e.g., of on-chip and off-chip interconnects [8], [3], [24], [21], [17], [22], [26]). Several recent works focus on bandwidth compression to decrease memory traffic by transmitting data in a compressed form in both CPUs [17], [24], [3] and GPUs [21], [17], [26], which results in better system performance and energy consumption.…”

Section: Introductionmentioning

confidence: 99%

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Toggle-Aware Compression for GPUs

Pekhimenko

Bolotin

O’Connor

et al. 2015

IEEE Comput. Arch. Lett.

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Abstract-Memory bandwidth compression can be an effective way to achieve higher system performance and energy efficiency in modern data-intensive applications by exploiting redundancy in data. Prior works studied various data compression techniques to improve both capacity (e.g., of caches and main memory) and bandwidth utilization (e.g., of the on-chip and off-chip interconnects). These works addressed two common shortcomings of compression: (i) compression/decompression overhead in terms of latency, energy, and area, and (ii) hardware complexity to support variable data size. In this paper, we make the new observation that there is another important problem related to data compression in the context of the communication energy efficiency: transferring compressed data leads to a substantial increase in the number of bit toggles (communication channel switchings from 0 to 1 or from 1 to 0). This, in turn, increases the dynamic energy consumed by on-chip and off-chip buses due to more frequent charging and discharging of the wires. Our results, for example, show that the bit toggle count increases by an average of 2.2× with some compression algorithms across 54 mobile GPU applications. We characterize and demonstrate this new problem across a wide variety of 221 GPU applications and six different compression algorithms. To mitigate the problem, we propose two new toggle-aware compression techniques: Energy Control and Metadata Consolidation. These techniques greatly reduce the bit toggle count impact of the six data compression algorithms we examine, while keeping most of their bandwidth reduction benefits.

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Section: Why Data Compression Can Be Energy-inefficientmentioning

confidence: 91%

Section: Our Approach: Toggle-aware Compressionmentioning

confidence: 99%

Section: Motivation Problem and Analysismentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Toggle-Aware Compression for GPUs

Pekhimenko

Bolotin

O’Connor

et al. 2015

IEEE Comput. Arch. Lett.

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A Case for Partial Co-allocation Constraints in Compressed Caches

Carvalho

Seznec²

2022

Lecture Notes in Computer Science

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Compressed cache layouts require adding the block's size information to the metadata array. This field can be either constrainedin which case compressed blocks must fit in predetermined sizes; thus, it reduces co-allocation opportunities but has easier management -or unconstrained -in which case compressed blocks can compress to any size; thus, it increases co-allocation opportunities, at the cost of more metadata and latency overheads. This paper introduces the concept of partial constraint, which explores multiple layers of constraint to reduce the overheads of unconstrained sizes, while still allowing a high co-allocation flexibility. Finally, Pairwise Space Sharing (PSS) is proposed, which leverages a special case of a partially constrained system. PSS can be applied orthogonally to compaction methods at no extra latency penalty to increase the cost-effectiveness of their metadata overhead. This concept is compression-algorithm independent, and results in an increase of the effective compression ratios achieved while making the most of the metadata bits. When normalized against compressed systems not using PSS, a compressed system extended with PSS further enhances the average cache capacity of nearly every workload.

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